82541(PI/GI/EI) — Networking Silicon

iv

5.4

Visual Pin Assignments....................................................................................... 46

Figures

1

82541(PI/GI/EI) External Architecture Block Diagram ........................................ 11

2

Internal Architecture Block Diagram.................................................................... 12

3

AC Test Loads for General Output Pins.............................................................. 27

4

AC Test Loads for General Output Pins.............................................................. 28

5

AC Test Loads for General Output Pins.............................................................. 29

6

AC Test Loads for General Output Pins.............................................................. 29

7

TVAL (max) Rising Edge Test Load.................................................................... 30

8

TVAL (max) Falling Edge Test Load ................................................................... 30

9

TVAL (min) Test Load ......................................................................................... 30

10

TVAL Test Load (PCI 5 V Signaling Environment) ............................................. 31

11

Link Interface Rise/Fall Timing ............................................................................ 31

11

82541(PI/GI/EI) Mechanical Specifications......................................................... 33

12

196 PBGA Package Pad Detail........................................................................... 34

13

Visual Pin Assignments....................................................................................... 46

Tables

1

Absolute Maximum Ratings ................................................................................ 19

2

Recommended Operating Conditions ................................................................ 19

3

3.3V Supply Voltage Ramp ................................................................................. 20

4

1.8V Supply Voltage Ramp ................................................................................. 20

5

1.2V Supply Voltage Ramp ................................................................................. 21

6

DC Characteristics .............................................................................................. 22

7

Power Specifications - D0a ................................................................................. 22

8

Power Specifications - D3cold ............................................................................ 23

9

Power Specifications D(r) Uninitialized ............................................................... 23

10

Power Specifications - Complete Subsystem ..................................................... 24

11

I/O Characteristics............................................................................................... 24

12

AC Characteristics: 3.3 V Interfacing .................................................................. 25

13

25 MHz Clock Input Requirements ..................................................................... 25

14

Reference Crystal Specification Requirements................................................... 26

15

Link Interface Clock Requirements ..................................................................... 26

16

EEPROM Interface Clock Requirements ............................................................ 26

17

PCI Bus Interface Clock Parameters .................................................................. 27

18

PCI Bus Interface Timing Parameters................................................................. 28

19

PCI Bus Interface Timing Measurement Conditions ........................................... 29

20

Link Interface Rise and Fall Times...................................................................... 31

21

EEPROM Link Interface Clock Requirements..................................................... 32

22

EEPROM Link Interface Clock Requirements..................................................... 32

13

Thermal Characteristics ...................................................................................... 35

14

PCI Address, Data and Control Signals .............................................................. 36

15

PCI Arbitration Signals ........................................................................................ 36

16

Interrupt Signals .................................................................................................. 36

17

System Signals ................................................................................................... 36

18

Error Reporting Signals....................................................................................... 37

19

Power Management Signals ............................................................................... 37

20

SMB Signals........................................................................................................ 37