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DAC8512FSZ 数据表(PDF) 18 Page - Analog Devices

部件名 DAC8512FSZ
功能描述  5 V, Serial Input Complete 12-Bit DAC
PDF  20 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

DAC8512FSZ 数据表(HTML) 18 Page - Analog Devices

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DAC8512
–18–
REV. A
DAC8512–M68HC11 Interface Program Source Code
*
PORTC
EQU
$1003
Port C control register
*
“0,0,0,0;0,0,CLR/,CS/”
DDRC
EQU
$1007
Port C data direction
PORTD
EQU
$1008
Port D data register
*
“0,0,LD/,SCLK;SDI,0,0,0
DDRD
EQU
$1009
Port D data direction
SPCR
EQU
$1028
SPI control register
*
“SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPRl,SPR0”
SPSR
EQU
$1029
SPI status register
*
“SPIF,WCOL,0,MODF;0,0,0,0”
SPDR
EQU
$102A
SPI data register; Read-Buffer; Write-Shifter
*
* SDI RAM variables:
SDI1 is encoded from 0 (Hex) to F (Hex)
*
SDI2 is encoded from 00 (Hex) to FF (Hex)
*
DAC requires two 8-bit loads; upper 4 bits of SDI1
*
are ignored.
*
SDI1
EQU
$00
SDI packed byte 1 “0,0,0,0;MSB,DB10,DB9,DB8”
SDI2
EQU
$01
SDI packed byte 2 “DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0”
*
ORG
$C000
Start of user’s RAM in EVB
INIT
LDS
#$CFFF
Top of C page RAM
*
LDAA
#$03
0,0,0,0;0,0,1,1
*
CLR/-Hi, CS/-Hi
STAA
PORTC
Initialize Port C Outputs
LDAA
#$03
0,0,0,0;0,0,1,1
STAA
DDRC
CLR/ and CS/ are now enabled as outputs
*
LDAA
#$30
0,0,1,1;0,0,0,0
*
LDI-Hi,SCLK-Hi,SDI-Lo
STAA
PORTD
Initialize Port D Outputs
LDAA
#$38
0,0,1,1;1,0,0,0
STAA
DDRD
LD/,SCLK, and SDI are now enabled as outputs
*
LDAA
#$5F
STAA
SPCR
SPI is Master,CPHA=1,CPOL=1,Clk rate=E/32
*
BSR
UPDATE
Xfer 2 8-bit words to DAC8512
JMP
$E000
Restart BUFFALO
*
UPDATE
PSHX
Save registers X, Y, and A
PSHY
PSHA
*
LDAA
#$0A
0,0,0,0;1,0,1,0
STAA
SDI1
SDI1 is set to 0A (Hex)
*
LDAA
#$AA
1,0,1,0;1,0,1,0
STAA
SDI2
SDI2 is set to AA (Hex)
*
LDX
#SDI1
Stack pointer at 1st byte to send via SDI
LDY
#$1000
Stack pointer at on-chip registers
*
BCLR
PORTC,Y
$02 Assert CLR/
BSET
PORTC,Y
$02 De-assert CLR/
*
BCLR
PORTC,Y
$01 Assert CS/
*



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