THS1031CPWR datasheet(3/41 Pages) TI

3 / 41 page

THS1031

3-V TO 5.5-V, 10-BIT, 30 MSPS

CMOS ANALOG-TO-DIGITAL CONVERTER

SLAS242E – NOVEMBER 1999 – REVISED MARCH 2002

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

Terminal Functions

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

AGND

Analog ground

AIN

Analog input

AVDD

Analog supply

CLAMP

High to enable clamp mode, low to disable clamp mode

CLAMPIN

Connect to an external analog clamp reference input.

CLK

Clock input

DGND

Digital ground

DVDD

Digital driver supply

I/O0

I/O1

I/O2

I/O3

I/O4

I/O5

I/O6

I/O7

I/O8

I/O9

I/O

Digital I/O bit 0 (LSB)

Digital I/O bit 1

Digital I/O bit 2

Digital I/O bit 3

Digital I/O bit 4

Digital I/O bit 5

Digital I/O bit 6

Digital I/O bit 7

Digital I/O bit 8

Digital I/O bit 9 (MSB)

MODE

Mode input

High to 3-state the data bus, low to enable the data bus

OVR

Out-of-range indicator

REFBS

Reference bottom sense

REFBF

Reference bottom decoupling

REFSENSE

Reference sense

REFTF

Reference top decoupling

REFTS

Reference top sense

VREF

I/O

Internal and external reference

Write strobe

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