USB4604 datasheet(32/71 Pages) SMSC

32 / 71 page

USB 2.0 HSIC Hi-Speed 4-Port Hub Controller

Datasheet

Revision 1.0 (06-17-13)

SMSC USB4604

DATASHEET

6.3

Device Configuration Straps

Configuration straps are multi-function pins that are driven as outputs during normal operation. During

a Power-On Reset (POR) or an External Chip Reset (RESET_N), these outputs are tri-stated. The high

or low state of the signal is latched following de-assertion of the reset and is used to determine the

default configuration of a particular feature. Configuration straps are latched as a result of a Power-On

Reset (POR) or a External Chip Reset (RESET_N). Configuration strap signals are noted in Chapter 3,

"Pin Descriptions," on page 10 and are identified by an underlined symbol name. The following sub-

sections detail the various configuration straps.

Configuration straps include internal resistors in order to prevent the signal from floating when

unconnected. If a particular configuration strap is connected to a load, an external pull-up or pull-down

should be used to augment the internal resistor to ensure that it reaches the required voltage level

prior to latching. The internal resistor can also be overridden by the addition of an external resistor.

Note: The system designer must guarantee that configuration straps meet the timing requirements

specified in Section 9.5.2, "Reset and Configuration Strap Timing," on page 64 and Section

9.5.1, "Power-On Configuration Strap Valid Timing," on page 64. If configuration straps are not

at the correct voltage level prior to being latched, the device may capture incorrect strap

values.

Note: Configuration straps must never be driven as inputs. If required, configuration straps can be

augmented, or overridden with external resistors.

6.3.1

Port Disable (PRT_DIS_Mx/PRT_DIS_Px)

These configuration straps disable the associated USB ports D- and D+ signals, respectively, where

“x” is the USB port number. Both the negative “M” and positive “P” port disable configuration straps for

a given USB port must be tied high at reset to disable the associated port.

6.3.2

SPI Speed Select (SPI_SPD_SEL)

This strap is used to select the speed of the SPI as follows:

Note: If the latched value on reset is 1, this pin is tri-stated when the chip is in the suspend state. If

the latched value on reset is 0, this pin is driven low during a suspend state.

Table 6.1 PRT_DIS_Mx/PRT_DIS_Px Configuration Definitions

PRT_DIS_MX/PRT_DIS_PX

DEFINITION

‘0’

Port x D-/D+ Signal is Enabled (Default)

‘1’

Port x D-/D+ Signal is Disabled

Table 6.2 SPI_SPD_SEL Configuration Definitions

SPI_SPD_SEL

DEFINITION

‘0’

30 MHz SPI Operation (Default)

‘1’

60 MHz SPI Operation

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