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USB4604 数据表(PDF) 41 Page - SMSC Corporation |
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USB4604 数据表(HTML) 41 Page - SMSC Corporation |
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41 / 71 page ![]() USB 2.0 HSIC Hi-Speed 4-Port Hub Controller Datasheet SMSC USB4604 41 Revision 1.0 (06-17-13) DATASHEET BC_CTL_RUN_TIME (Upstream) 0x6102 Table 7.14, "Upstream (Port 0) Battery Charging Run Time Control Register" BC_CTL_DET (Upstream) 0x6103 Table 7.15, "Upstream (Port 0) Battery Charging Detect Register" Table 7.2 Upstream Battery Charging Detection Control Register UP_BC_DET (0x30E2 - RESET= 0x02) UPSTREAM BATTERY CHARGING REGISTER BIT NAME R/W DESCRIPTION 7:5 CHARGER_TYPE R/W Read Only. This field indicates the result of the automatic charger detection. Values reported depend on EnhancedChrgDet bit setting in Upstream Battery Charger Mode Register. If EnhancedChrgDet = 1 000 = Charger Detection is not complete. 001 = DCP - Dedicated Charger Port 010 = CDP – Charging Downstream Port 011 = SDP – Standard Downstream Port 100 = Apple Low Current Charger 101 = Apple High Current Charger 110 = Apple Super High Current Charger 111 = Charger Detection Disabled If EnhancedChrgDet = 0 000 = Charger Detection is not complete. 001 = DCP/CDP – Dedicated Charger or Charging Downstream Port 010 = Reserved 011 = SDP – Standard Downstream Port 100 = Apple Low Current Charger 101 = Apple High Current Charger 110 = Apple Super High Current Charger 111 = Charger Detection Disabled 4 CHGDET_COMPLETE R Indicates Charger Detection has been run and is completed. This bit is negated when START_CHG_DET is asserted high. 3 Reserved R/W Reserved for debugging 2:1 CHG_DET[1:0] R Indicates encoded status of what chargers or status has been detected according to the settings in the Charge Detect Mask Register. It can be used to determine what current can be drawn from the upstream USB port. 00 = No selected Chargers or Status identified 01 = 100ma (VBUS detect without enumeration) 10 = 500ma (Device enumerated, Set Config seen) 11 = 1000+ma (Charger detected) The actual current amount for the charger will be system dependent Table 7.1 SMBus Accessible Run Time Registers (continued) NAME XDATA ADDR |
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