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H5TQ4G43AFR-RDC 数据表(PDF) 24 Page - Hynix Semiconductor

部件名 H5TQ4G43AFR-RDC
功能描述  4Gb DDR3 SDRAM
PDF  35 Pages
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制造商  HYNIX [Hynix Semiconductor]
网页  http://www.skhynix.com/kor/main.do
标志 HYNIX - Hynix Semiconductor

H5TQ4G43AFR-RDC 数据表(HTML) 24 Page - Hynix Semiconductor

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Rev. 1.0 / Apr. 2013
24
Table 10 - IDD7 Measurement-Loop Patterna)
ATTENTION! Sub-Loops 10-19 have inverse A[6:3] Pattern and Data Pattern than Sub-Loops 0-9
a) DM must be driven LOW all the time. DQS, DQS are used according to RD Commands, otherwise MID-LEVEL.
b) Burst Sequence driven on each DQ signal by Read Command. Outside burst operation, DQ signals are MID-LEVEL.
Datab)
0
0
ACT
0
0
1
1
0
0
00
0
0
0
0
-
1
RDA
0
1
0
1
0
0
00
1
0
0
0
00000000
2D
1
0
0
0
0
0
00
0
0
0
0
-
...
repeat above D Command until nRRD - 1
1
nRRD
ACT
0
0
1
1
0
1
00
0
0
F
0
-
nRRD+1
RDA
0
1
0
1
0
1
00
1
0
F
0
00110011
nRRD+2
D
1
0
0
0
0
1
00
0
0
F
0
-
...
repeat above D Command until 2* nRRD - 1
2
2*nRRD
repeat Sub-Loop 0, but BA[2:0] = 2
3
3*nRRD
repeat Sub-Loop 1, but BA[2:0] = 3
4
4*nRRD
D1
0
0
0
0
3
00
0
0
F
0
-
Assert and repeat above D Command until nFAW - 1, if necessary
5
nFAW
repeat Sub-Loop 0, but BA[2:0] = 4
6
nFAW+nRRD
repeat Sub-Loop 1, but BA[2:0] = 5
7
nFAW+2*nRRD
repeat Sub-Loop 0, but BA[2:0] = 6
8
nFAW+3*nRRD
repeat Sub-Loop 1, but BA[2:0] = 7
9
nFAW+4*nRRD
D1
0
0
0
0
7
00
0
0
F
0
-
Assert and repeat above D Command until 2* nFAW - 1, if necessary
10
2*nFAW+0
ACT
0
0
1
1
0
0
00
0
0
F
0
-
2*nFAW+1
RDA
0
1
0
1
0
0
00
1
0
F
0
00110011
2&nFAW+2
D1
0
0
0
0
0
00
0
0
F
0
-
Repeat above D Command until 2* nFAW + nRRD - 1
11
2*nFAW+nRRD
ACT
0
0
1
1
0
1
00
0
0
0
0
-
2*nFAW+nRRD+1
RDA
0
1
0
1
0
1
00
1
0
0
0
00000000
2&nFAW+nRRD+
2
D1
0
0
0
0
1
00
0
0
0
0
-
Repeat above D Command until 2* nFAW + 2* nRRD - 1
12 2*nFAW+2*nRRD repeat Sub-Loop 10, but BA[2:0] = 2
13 2*nFAW+3*nRRD repeat Sub-Loop 11, but BA[2:0] = 3
14 2*nFAW+4*nRRD
D1
0
0
0
0
3
00
0
0
0
0
-
Assert and repeat above D Command until 3* nFAW - 1, if necessary
15 3*nFAW
repeat Sub-Loop 10, but BA[2:0] = 4
16 3*nFAW+nRRD
repeat Sub-Loop 11, but BA[2:0] = 5
17 3*nFAW+2*nRRD repeat Sub-Loop 10, but BA[2:0] = 6
18 3*nFAW+3*nRRD repeat Sub-Loop 11, but BA[2:0] = 7
19 3*nFAW+4*nRRD
D1
0
0
0
0
7
00
0
0
0
0
-
Assert and repeat above D Command until 4* nFAW - 1, if necessary



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