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AD9952

Rev. B | Page 14 of 28

Table 4. Clock Input Modes of Operation

CFR1 [4]

CLKMODESELECT

CFR2 [7:3]

Oscillator Enabled

System Clock

Frequency Range (MHz)

Low

High

3 < M < 21

Yes

FCLK = F

OSC × M

80 < FCLK < 400

Low

High

M < 4 or M > 20

Yes

FCLK = F

OSC

20 < FCLK < 30

Low

3 < M < 21

FCLK = F

OSC × M

80 < FCLK < 400

Low

M < 4 or M > 20

FCLK = F

OSC

10 < FCLK < 400

High

FCLK = 0

N/A

DAC Output

The AD9952 incorporates an integrated 14-bit current output

DAC. Unlike most DACs, this output is referenced to AVDD,

not AGND.

Two complementary outputs provide a combined full-scale

output current (IOUT). Differential outputs reduce the amount of

common-mode noise that might be present at the DAC output,

offering the advantage of an increased signal-to-noise ratio. The

full-scale current is controlled by an external resistor (RSET)

connected between the DAC_RSET pin and the DAC ground

(AGND_DAC). The full-scale current is proportional to the

resistor value as follows:

OUT

SET

The maximum full-scale output current of the combined DAC

outputs is 15 mA, but limiting the output to 10 mA provides the

best spurious-free dynamic range (SFDR) performance. The DAC

output compliance range is AVDD + 0.5 V to AVDD – 0.5 V.

Voltages developed beyond this range cause excessive DAC

distortion and could potentially damage the DAC output

circuitry. Proper attention should be paid to the load termination

to keep the output voltage within this compliance range.

Comparator

Many applications require a square wave signal rather than a

sine wave. For example, in most clocking applications a high

slew rate helps to reduce phase noise and jitter. To support these

applications, the AD9952 includes an on-chip comparator. The

comparator has a bandwidth greater than 200 MHz and a

common-mode input range of 1.3 V to 1.8 V. By setting the

comparator power-down bit, CFR1 [6], the comparator can be

turned off to save on power consumption.

Serial I/O Port

The AD9952 serial port is a flexible, synchronous serial

communications port that allows easy interface to many

industry-standard microcontrollers and microprocessors. The

serial I/O port is compatible with most synchronous transfer

formats, including both the Motorola 6905/11 SPI® and Intel®

8051 SSR protocols.

The interface allows read/write access to all registers that configure

the AD9952. MSB first or LSB first transfer formats are supported.

The AD9952 serial interface port can be configured as a single pin

I/O (SDIO) that allows a 2-wire interface or two unidirectional pins

for in/out (SDIO/SDO), which in turn enable a 3-wire interface.

Two optional pins, IOSYNC and CS

, enable greater flexibility for

system design in the AD9952. Please see the Serial Port Operation

section for details on how to program the AD9952 through the

serial I/O port.

The register map is listed in Table 5.

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