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LPS001WP 数据表(PDF) 11 Page - STMicroelectronics |
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LPS001WP 数据表(HTML) 11 Page - STMicroelectronics |
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11 / 30 page ![]() LPS001WP Application hints Doc ID 18171 Rev 1 11/30 5 Application hints Figure 3. LPS001WP electrical connection The device core is supplied through the Vdd line. Power supply decoupling capacitors (100 nF ceramic, 10 µF aluminum) should be placed as near as possible to the supply pad of the device (common design practice). The functionality of the device and the measured data outputs are selectable and accessible through the I2C/SPI interface. When using the I2C, CS must be tied high. It is possible to change, on the fly, the communication interface used to access the device registers. The PS (Protocol Selection) pin performs this change. 5.1 Soldering information The HCLGA package is compliant with the ECOPACK® standard. It is qualified for soldering heat resistance according to JEDEC J-STD-020C. 5.2 Procedure for single acquisition (low power consumption) If the LPS001WP output data rate requested is lower than 7 Hz, a dedicated procedure to reduce the power consumption can be implemented. LPS001WP is in power down, then it is woken up for the acquisition and again put in power down. This procedure reduces the power consumption. Obsolete Product(s) - Obsolete Product(s) |
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