LPS001WP

Digital interfaces

Doc ID 18171 Rev 1

13/30

6

Digital interfaces

SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire

interface mode.

line must be tied high.

(logical ‘1’), pin SDO and SDI are put in tri-state.

6.1

whose content can also be read back.

Table 8.

data line (SDA). The latter is a bi-directional line used for sending and receiving the data

to/from the interface. Both the lines are connected to Vdd through a pull-up resistor

embedded inside the LPS001WP. When the bus is free, both lines are high.

Table 7.

Serial interface pin description

PIN Name

PIN Description

PS

Protocol selection

CS

SPI enable (chip select)

SCL/SPC

SPI serial port clock (SPC)

SDA/SDI/SDO

SPI serial data input (SDI)

3-wire interface serial data output (SDO)

SA0/SDO

SPI serial data output (SDO)

Table 8.

Serial interface pin description

Term

Description

Transmitter

The device which sends data to the bus

Receiver

The device which receives data from the bus

Master

The device which initiates a transfer, generates clock signals, and terminates a

transfer

Slave

The device addressed by the master

Obsolete

Product(s)

- Obsolete

Product(s)