LSM9DS0TR datasheet(38/74 Pages) STMICROELECTRONICS

38 / 74 page

LSM9DS0

38/74

DocID024763 Rev 2

The table given below provides a listing of the 8-bit registers embedded in the device and

their respective addresses.

Table 17. Register address map

Name

Slave

Address

Type

Default

Hex

Binary

Reserved

Table 16

00-0E

WHO_AM_I_G

Table 16

000 1111

11010100

Reserved

Table 16

10-1F

CTRL_REG1_G

Table 16

010 0000

00000111

CTRL_REG2_G

Table 16

010 0001

00000000

CTRL_REG3_G

Table 16

010 0010

00000000

CTRL_REG4_G

Table 16

010 0011

00000000

CTRL_REG5_G

Table 16

010 0100

00000000

REFERENCE_G

Table 16

010 0101

00000000

Reserved

Table 16

STATUS_REG_G

Table 16

010 0111

output

OUT_X_L_G

Table 16

010 1000

output

OUT_X_H_G

Table 16

010 1001

output

OUT_Y_L_G

Table 16

010 1010

output

OUT_Y_H_G

Table 16

010 1011

output

OUT_Z_L_G

Table 16

010 1100

output

OUT_Z_H_G

Table 16

010 1101

output

FIFO_CTRL_REG_G

Table 16

010 1110

00000000

FIFO_SRC_REG_G

Table 16

010 1111

output

INT1_CFG_G

Table 16

011 0000

00000000

INT1_SRC_G

Table 16

011 0001

output

INT1_TSH_XH_G

Table 16

011 0010

00000000

INT1_TSH_XL_G

Table 16

011 0011

00000000

INT1_TSH_YH_G

Table 16

011 0100

00000000

INT1_TSH_YL_G

Table 16

011 0101

00000000

INT1_TSH_ZH_G

Table 16

011 0110

00000000

INT1_TSH_ZL_G

Table 16

011 0111

00000000

INT1_DURATION_G

Table 16

011 1000

00000000

Reserved

Table 15

00-04

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