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ADS8401 数据表(PDF) 19 Page - Texas Instruments |
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ADS8401 数据表(HTML) 19 Page - Texas Instruments |
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19 / 29 page ![]() www.ti.com REFERENCE ANALOG INPUT _ + _ + IN− IN+ ADS8406 _ + VCC+ VCC− 1 k Ω 1 k Ω THS4503 68 pF 68 pF 50 Ω 50 Ω 20 pF RG RS RT OCM 1 k Ω RG, RS, and RT should be chosen such that RG + RS || RT = 1 k Ω VOCM = 2 V, +VCC = 7 V, and −VCC = −7 V ADS8406 SLAS426A – AUGUST 2004 – REVISED DECEMBER 2004 PRINCIPLES OF OPERATION (continued) The analog input is provided to two input pins: +IN and –IN. When a conversion is initiated, the differential input on these pins is sampled on the internal capacitor array. While a conversion is in progress, both inputs are disconnected from any internal function. The ADS8406 can operate with an external reference with a range from 2.5 V to 4.2 V. A 4.096-V internal reference is included. When internal reference is used, pin 2 (REFOUT) should be connected to pin 1 (REFIN) with a 0.1-µF decoupling capacitor and 1-µF storage capacitor between pin 2 (REFOUT) and pins 47 and 48 (REFM) (see Figure 33). The internal reference of the converter is double buffered. If an external reference is used, the second buffer provides isolation between the external reference and the CDAC. This buffer is also used to recharge all of the capacitors of the CDAC during conversion. Pin 2 (REFOUT) can be left unconnected (floating) if external reference is used. When the converter enters the hold mode, the voltage difference between the +IN and -IN inputs is captured on the internal capacitor array. Both +IN and –IN inputs have a range of –0.2 V to Vref + 0.2 V. The input span (+IN – (–IN)) is limited to -Vref to Vref.. The input current on the analog inputs depends upon a number of factors: sample rate, input voltage, and source impedance. Essentially, the current into the ADS8406 charges the internal capacitor array during the sample period. After this capacitance has been fully charged, there is no further input current. The source of the analog input voltage must be able to charge the input capacitance (25 pF) to an 16-bit settling level within the acquisition time (150 ns) of the device. When the converter goes into the hold mode, the input impedance is greater than 1 G Ω. Care must be taken regarding the absolute analog input voltage. To maintain the linearity of the converter, the +IN and –IN inputs and the span (+IN – (–IN)) should be within the limits specified. Outside of these ranges, the converter's linearity may not meet specifications. To minimize noise, low bandwidth input signals with low-pass filters should be used. Care should be taken to ensure that the output impedance of the sources driving +IN and –IN inputs are matched. If this is not observed, the two inputs could have different setting time. This may result in offset error, gain error and linearity error which varies with temperature and input voltage. A typical input circuit using TI's THS4503 is shown in Figure 33. Input from a single-ended source may be converted into a differential signal for the ADS8406 as shown in the figure. In case the source itself is differential, then the THS4503 may be used in differential input and differential output modes. Figure 33. Using the THS4503 With the ADS8406 19 |
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