DocID7791 Rev 7

13/19

L9823

Functional description

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3

Functional description

3.1

General

The L9823 integrated circuit features 8 power low-side-driver outputs. Data is transmitted to

the device using the Serial Peripheral Interface = SPI protocol. The power outputs features

voltage clamping function for flyback current recirculation and are protected against short

circuit to Vbat.

The diagnostics recognizes two outputs fault conditions: 1) overcurrent and thermal

overload in switch-ON condition and 2) open load or short to GND in switch-OFF condition

for all outputs. The outputs status can be read out via the serial interface.

The chip internal Reset is a OR function of the external Reset signal and internally

generated undervoltage Reset signal.

3.2

Output stages control

Each output is controlled with its latch and with a common Reset line, which enables all

outputs.

The control data are transmitted via the SI input, the timing of the serial interface is shown in

Figure 4.

The device is selected with low CSB signal and the input data are transferred into the 8 bit

shift register at every falling SCLK edge. The rising edge of the CSB latches the new data

from the shift register to the drivers.

Figure 4. Timing of the serial interface

The SPI register data are transferred to the output latch at rising CSB edge. The digital filter

between CSB and the output latch ensures that the data are transferred only after 8 SCLK

cycles or multiple of 8 SCLK cycles since the last CSB falling edge. The CSB changes only

at low SCLK.