BQ76PL536APAPR datasheet(47/60 Pages) TI1

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Enable Group3 Write:

Write: 0x35 to SHDW_CTRL (0x3a)

Host enables write to USER Block

Write: 0x91 to E_EN @0x3f

Apply 7 V to

LDOD1(2) pin

Host writes data to Registers in USER

Block 0x40–0x47

Write data to Registers

Write: 0xnn to 0x4x

ADDR++

ADDR > 0x4b?

Yes

Verify Data in 0x40–0x47

Copy EPROM back to Registers

Write 0x27 to SHDW_CTRL (0x3a)

Read Register block

0x40–0x4b

Contents match

programmed value?

Yes

Verify ECC bits

Read DEVICE_STATUS [ECC_COR]

Read ALERT_STATUS [PARITY]

All == 0?

Yes

SUCCESS

FAIL

Programming complete

Nominal time

~ 2 ms to 3 ms

Remove 7 V from

LDOD1(2) pins

bq76PL536A

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SLUSAD3A – JUNE 2011 – REVISED AUGUST 2012

PROGRAMMING THE EPROM CONFIGURATION REGISTERS

The bq76PL536A has a block of OTP-EPROM that is used for configuring the operation of the bq76PL536A.

Programming of the EPROM should take place during pack/system manufacturing. A 7-V (VPP) pulse is required

on the PROG pin. The part uses an internal window comparator to check the voltage, and times the internal

pulse delivered to the EPROM array.

The user first writes the desired values to all of the equivalent Group3 protected register addresses. The desired

data is written to the appropriate address by first applying 7 V to the LDOD1(2) pins. Programming then

performed by writing to the EE_EN register (address 0x3f) with data 0x91. After a time period > 1500 µs, the 7 V

is removed. Nominally, the voltage pulse should be applied for approximately 2–3 ms. Applying the voltage for an

extended period of time may lead to device damage. The write is self-timed internally after receipt of the

command. The following flow chart illustrates the procedure for programming.

Figure 16. EPROM Programming

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