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LT1806/LT1807

18067fc

APPLICATIONS INFORMATION

The LT1806/LT1807’s input stages are also protected

against large differential input voltages of 1.4V or higher

by a pair of back-to-back diodes, D5/D8, that prevent

the emitter-base breakdown of the input transistors. The

current in these diodes should be limited to less than 10mA

when they are active. The worst-case differential input

voltage usually occurs when the input is driven while the

output is shorted to ground in a unity gain conﬁguration.

In addition, the ampliﬁer is protected against ESD strikes

up to 3kV on all pins by a pair of protection diodes, ESDD1

to ESDD6, on each pin that are connected to the power

supplies as shown in Figure 1.

Capacitive Load

The LT1806/LT1807 are optimized for high bandwidth and

low distortion applications. They can drive a capacitive

load of about 20pF in a unity-gain conﬁguration, and more

for higher gain. When driving a larger capacitive load, a

resistor of 10Ω to 50Ω should be connected between the

output and the capacitive load to avoid ringing or oscilla-

tion. The feedback should still be taken from the output so

that the resistor will isolate the capacitive load to ensure

stability. Graphs on capacitive loads indicate the transient

response of the ampliﬁer when driving the capacitive load

with a speciﬁed series resistor.

Feedback Components

When feedback resistors are used to set up gain, care must

be taken to ensure that the pole formed by the feedback

resistors and the total capacitance at the inverting input

does not degrade stability. For instance, the LT1806/LT1807

in a noninverting gain of 2, set up with two 1k resistors

and a capacitance of 3pF (part plus PC board) will probably

ring in transient response. The pole is formed at 106MHz

that will reduce phase margin by 34 degrees when the

crossover frequency of the ampliﬁer is around 70MHz. A

capacitor of 3pF or higher connected across the feedback

resistor will eliminate any ringing or oscillation.

SHDN Pin

The LT1806 has a SHDN pin to reduce the supply current

to less than 0.9mA. When the SHDN pin is pulled low, it

will generate a signal to power down the device. If the pin

is left unconnected, an internal pull-up resistor of 40k will

keep the part fully operating as shown in Figure 1. The

output will be high impedance during shutdown, and the

turn-on and turn-off time is less than 100ns. Because

the input is protected by a pair of back-to-back diodes,

the input signal will feed through to the output during

shutdown mode if the amplitude of signal between the

inputs is larger than 1.4V.

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