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MPC8548ECPXAUJC 数据表(PDF) 15 Page - Freescale Semiconductor, Inc |
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MPC8548ECPXAUJC 数据表(HTML) 15 Page - Freescale Semiconductor, Inc |
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15 / 151 page ![]() MPC8548E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 9 Freescale Semiconductor 15 Power Characteristics 3 Power Characteristics The estimated typical power dissipation for the core complex bus (CCB) versus the core frequency for this family of PowerQUICC III devices is shown in the following table. Table 4. Device Power Dissipation CCB Frequency1 Core Frequency SLEEP2 Typical-653 Typical-1054 Maximum5 Unit 400 800 2.7 4.6 7.5 8.1 W 1000 2.7 5.0 7.9 8.5 W 1200 2.7 5.4 8.3 8.9 500 1500 11.5 13.6 16.5 18.6 W 533 1333 6.2 7.9 10.8 12.8 W Notes: 1. CCB frequency is the SoC platform frequency, which corresponds to the DDR data rate. 2. SLEEP is based on VDD = 1.1 V, Tj = 65C. 3. Typical-65 is based on VDD = 1.1 V, Tj = 65C, running Dhrystone. 4. Typical-105 is based on VDD = 1.1 V, Tj = 105C, running Dhrystone. 5. Maximum is based on VDD = 1.1 V, Tj = 105C, running a smoke test. |
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