3A Bus Termination Regulator

Copyright

© ANPEC Electronics Corp.

Rev. B.4 - Mar., 2008

APL5331

www.anpec.com.tw

1

ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and

advise customers to obtain the latest version of relevant information to verify before placing orders.

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Provide Bi-direction Current

- Sourcing or Sinking Current up to 3A

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1.25V/0.9V Output for DDR I/II Applications

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Fast Transient Response

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High Output Accuracy

- ±20mV over Load, VOUT Offset and Temperature

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Adjustable Output Voltage by External Resistors

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Current-Limit Protection

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On-Chip Thermal Shutdown

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Shutdown for Standby or Suspend Mode

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Simple SOP-8, SOP-8P with thermal pad,

TO-252-5 and TO-263-5 Packages

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Lead Free and Green Devices Available

(RoHS Compliant)

Features

Applications

General Description

The APL5331 linear regulator is designed to provide a

regulated voltage with bi-directional output current for

DDR-SDRAM termination voltage. The APL5331 inte-

grates two power transistors to source or sink current

up to 3A. It also incorporates current-limit, thermal shut-

down and shutdown control functions into a single chip.

The current-limit circuit limits the short-circuit current.

The on-chip thermal shutdown provides protection

against any combination of overload that would create

excessive junction temperature. The output voltage of

APL5331 tracks the voltage at VREF pin. A resistor di-

vider connected to VIN, GND and VREF pins is used to

provide a half voltage of VIN to VREF pin. In addition, an

external ceramic capacitor and an open-drain tran-

sistor connected to VREF pin provide soft-start and shut-

down control respectively. Pulling and holding the VREF

voltage to 0V shuts off the output. The output of the

APL5331 will be high impedance in shutdown condition.

Pin Configuration

TO-252-5 (Top View)

VOUT

VREF

VCNTL

GND

VIN

TAB is VCNTL

SOP-8 (Top View)

1

2

3

4

5

6

7

8

VIN

GND

VREF

VOUT

VCNTL

VCNTL

VCNTL

VCNTL

TO-263-5 (Top View)

VIN

GND

VCNTL

VREF

VOUT

1

2

3

4

5

TAB is VCNTL

1

2

3

4

5

6

7

8

VIN

GND

VREF

VOUT

NC

VCNTL

NC

NC

SOP-8P (Top View)

= Thermal Pad (connected to GND plane for better heat dissipation)

NC = No internal connection

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DDR I/II SDRAM Termination

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SSTL-2/3 Termination Voltage

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Applications Requiring the Regulator with

Bi-directional 3A Current Capability