PE97632 datasheet(5/15 Pages) PSEMI

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Product Specification

PE97632

Document No. 70-0205-07 │ www.psemi.com

Page 5 of 15

Table 2. Absolute Maximum Ratings

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS™ device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified in Table 4.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Notes 1. Periodically sampled, not 100% tested. Tested per MIL-STD-883,

M3015 C2.

2. Pin 52 is a test pin only. It is not used in normal operation.

Table 3. Operating Ratings

Symbol

Parameter/Conditions

Min

Max

Units

VDD

Supply voltage

-0.3

4.0

Voltage on any input

-0.3

VDD +

0.3

DC into any input

-10

+10

DC into any output

-10

+10

Tstg

Storage temperature

range

-65

150

°C

θJC

Theta JC

°C/W

Symbol

Parameter/Conditions

Min

Max

Units

VDD

Supply voltage

2.85

3.45

Operating ambient

temperature range

-40

°C

Table 4. ESD Ratings

Symbol

Parameter/Conditions

Level

Units

VESD

ESD Voltage Human Body Model

on all pins except pin 521

1000

ESD Voltage Human Body Model

on pin 521,2

300

Table 5. DC Characteristics: VDD = 3.30 V -40 °C < TA < 85 °C, unless otherwise specified

Symbol

Parameter

Conditions

Min

Typ

Max

Units

IDD

Operational supply current;

VDD = 2.85 to 3.45 V

Prescaler enabled

IDD

Operational supply current;

VDD = 2.85 to 3.45 V

Prescaler disabled

All Digital inputs: K[17:0], R[5:0], M[8:0], A[3:0], Direct,

Pre_en, RND_SEL, MS2_SEL, Enh (contains a 70 kΩ pull-down resistor)

VIH

High level input voltage

VDD = 2.85 to 3.45 V

0.7 x VDD

VIL

Low level input voltage

VDD = 2.85 to 3.45 V

0.3 x VDD

IIH

High level input current

VIH = VDD = 3.45 V

100

µA

IIL

Low level input current

VIL = 0, VDD = 3.45 V

-1

µA

Reference Divider input: fr

IIHR

High level input current

VIH = VDD = 3.45 V

100

µA

IILR

Low level input current

VIL = 0, VDD = 3.45 V

-100

µA

Counter and phase detector outputs: PD_

D, PD_U

VOLD

Output voltage LOW

Iout = 6 mA

0.4

VOHD

Output voltage HIGH

Iout = -3 mA

VDD - 0.4

Digital test outputs: Dout

VOLD

Output voltage LOW

Iout = 200 A

0.4

VOHD

Output voltage HIGH

Iout = -200 A

VDD - 0.4

Lock detect outputs: (Cext, LD)

VOLC

Output voltage LOW, Cext

Iout = 0.1 mA

0.4

VOHC

Output voltage HIGH, Cext

Iout = -0.1 mA

VDD - 0.4

VOLLD

Output voltage LOW, LD

Iout = 1 mA

0.4

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