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ADE7933 数据表(PDF) 112 Page - Analog Devices |
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ADE7933 数据表(HTML) 112 Page - Analog Devices |
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112 / 120 page ![]() ADE7978/ADE7933/ADE7932 Data Sheet Rev. 0 | Page 112 of 120 Table 50. CFMODE Register (Address 0xE610) Bits Bit Name Default Value Description [2:0] CF1SEL[2:0] 000 000: CF1 frequency is proportional to the sum of the total active powers on each phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register. 001: CF1 frequency is proportional to the sum of the total reactive powers on each phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register. 010: CF1 frequency is proportional to the sum of the apparent powers on each phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register. 011: CF1 frequency is proportional to the sum of the fundamental active powers on each phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register. 100: CF1 frequency is proportional to the sum of the fundamental reactive powers on each phase identified by Bits[2:0] (TERMSEL1[x]) in the COMPMODE register. 101, 110, 111: reserved. The CF1 signal is not generated. [5:3] CF2SEL[2:0] 001 000: CF2 frequency is proportional to the sum of the total active powers on each phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register. 001: CF2 frequency is proportional to the sum of the total reactive powers on each phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register. 010: CF2 frequency is proportional to the sum of the apparent powers on each phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register. 011: CF2 frequency is proportional to the sum of the fundamental active powers on each phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register. 100: CF2 frequency is proportional to the sum of the fundamental reactive powers on each phase identified by Bits[5:3] (TERMSEL2[x]) in the COMPMODE register. 101, 110, 111: reserved. The CF2 signal is not generated. [8:6] CF3SEL[2:0] 010 000: CF3 frequency is proportional to the sum of the total active powers on each phase identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register. 001: CF3 frequency is proportional to the sum of the total reactive powers on each phase identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register. 010: CF3 frequency is proportional to the sum of the apparent powers on each phase identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register. 011: CF3 frequency is proportional to the sum of the fundamental active powers on each phase identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register. 100: CF3 frequency is proportional to the sum of the fundamental reactive powers on each phase identified by Bits[8:6] (TERMSEL3[x]) in the COMPMODE register. 101, 110, 111: reserved. The CF3 signal is not generated. 9 CF1DIS 1 0: CF1 output is enabled. 1: CF1 output is disabled. The energy-to-frequency converter remains enabled. 10 CF2DIS 1 0: CF2 output is enabled. 1: CF2 output is disabled. The energy-to-frequency converter remains enabled. 11 CF3DIS 1 0: CF3 output is enabled. 1: CF3 output is disabled. The energy-to-frequency converter remains enabled. 12 CF1LATCH 0 0: no latching of energy registers occurs when a CF1 pulse is generated. 1: the contents of the corresponding energy registers are latched when a CF1 pulse is generated. See the Synchronizing Energy Registers with the CFx Outputs section. 13 CF2LATCH 0 0: no latching of energy registers occurs when a CF2 pulse is generated. 1: the contents of the corresponding energy registers are latched when a CF2 pulse is generated. See the Synchronizing Energy Registers with the CFx Outputs section. 14 CF3LATCH 0 0: no latching of energy registers occurs when a CF3 pulse is generated. 1: the contents of the corresponding energy registers are latched when a CF3 pulse is generated. See the Synchronizing Energy Registers with the CFx Outputs section. 15 Reserved 0 Reserved. This bit does not manage any functionality. |
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