Dual 3 A, 20 V Synchronous Step-Down

Regulator with Integrated High-Side MOSFET

Data Sheet

ADP2323

Rev. A

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FEATURES

Input voltage: 4.5 V to 20 V

±1% output accuracy

Integrated 90 mΩ typical high-side MOSFET

Flexible output configuration

Dual output: 3 A/3 A

Parallel single output: 6 A

Programmable switching frequency: 250 kHz to 1.2 MHz

External synchronization input with programmable phase

shift, or internal clock output

Selectable PWM or PFM mode operation

Adjustable current limit for small inductor

External compensation and soft start

Startup into precharged output

Supported by ADIsimPower™ design tool

APPLICATIONS

Communications infrastructure

Networking and servers

Industrial and instrumentation

Healthcare and medical

Intermediate power rail conversion

DC-to-dc point of load applications

TYPICAL APPLICATION CIRCUIT

INTVCC

L1

M1

M2

L2

MODE

SCFG

TRK2

TRK1

VDRV

ADP2323

GND

PGOOD2

PGOOD1

SYNC

RT

SW1

DL1

PGND

DL2

SW2

Figure 1.

GENERAL DESCRIPTION

The ADP2323 is a full featured, dual output, step-down dc-to-

dc regulator based on current-mode architecture. The ADP2323

integrates two high-side power MOSFETs and two low-side drivers

for the external N-channel MOSFETs. The two pulse-width mod-

ulation (PWM) channels can be configured to deliver dual 3 A

outputs or a parallel-to-single 6 A output. The regulator operates

from input voltages of 4.5 V to 20 V, and the output voltage can

be as low as 0.6 V.

The switching frequency can be programmed between 250 kHz

and 1.2 MHz, or synchronized to an external clock to minimize

interference in multirail applications. The dual PWM channels

run 180° out of phase, thereby reducing input current ripple as

well as reducing the size of the input capacitor.

The bidirectional synchronization pin can be programmed at

a 60°, 90°, or 120° phase shift, providing the possibility for a

stackable multiphase power solution.

The ADP2323 can be set to operate in pulse-frequency modulation

(PFM) mode at a light load for higher efficiency or in forced

PWM for noise sensitive applications. External compensation

and soft start provide design flexibility. Independent enable

inputs and power good outputs provide reliable power sequencing.

To enhance system reliability, the device also includes undervoltage

lockout (UVLO), overvoltage protection (OVP), overcurrent pro-

tection (OCP), and thermal shutdown (TSD).

The ADP2323 operates over the −40°C to +125°C junction

temperature range and is available in a 32-lead LFCSP_WQ

package.

50

55

60

65

70

75

80

85

90

95

100

0

0.5

1.0

1.5

2.0

2.5

3.0

OUTPUT CURRENT (A)