ADP2323ACPZ-R7 datasheet(17/32 Pages) AD

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Data Sheet

ADP2323

Rev. A | Page 17 of 32

The ADP2323 uses hiccup mode for overcurrent protection.

When the peak inductor current reaches the current-limit

threshold, the high-side MOSFET turns off and the low-side

driver turns on until the next cycle while the overcurrent

counter increments.

If the overcurrent counter reaches 10, or the FBx pin voltage falls

to 0.51 V after the soft start, the device enters hiccup mode. During

this mode, the high-side MOSFET and low-side driver are both

turned off. The device remains in this mode for seven soft start

times and then attempts to restart from soft start. If the current-

limit fault is cleared, the device resumes normal operation;

otherwise, it reenters hiccup mode.

In some cases, the input voltage (PVIN) ramp rate is too slow or

the output capacitor is too large to support the setting regulation

voltage during the soft start causing the device to enter the

hiccup mode. To avoid such cases, use a resistor divider at the

ENx pin to program the input voltage UVLO or use a longer

soft start time.

VOLTAGE TRACKING

The ADP2323 has a tracking input, TRKx, that allows the output

voltage to track an external (master) voltage. It allows power

sequencing applicable to FPGAs, DSPs, and ASICs, which may

require a power sequence between the core and the I/O voltages.

The internal error amplifier includes three positive inputs: the

internal reference voltage, the soft start voltage, and the tracking

input voltage. The error amplifier regulates the feedback voltage

to the lowest of the three voltages. To track a master voltage, tie the

TRKx pin to a resistor divider from the master voltage as shown

in Figure 43.

FBx

TRKx

SWx

ADP2323

VMASTER

RTRK_TOP

RTRK_BOT

VSLAVE

RTOP

RBOT

Figure 43. Voltage Tracking

A common application is coincident tracking, which is shown in

Figure 44. Coincident tracking limits the slave output voltage to

be the same as the master voltage until it reaches regulation. For

coincident tracking, set RTRK_TOP = RTOP and RTRK_BOT = RBOT.

TIME

VMASTER

VSLAVE

Figure 44. Coincident Tracking

Ratiometric tracking is shown in Figure 45. The slave output is

limited to a fraction of the master voltage. In this application, the

slave and master voltages reach the final value at the same time.

TIME

VMASTER

VSLAVE

Figure 45. Ratiometric Tracking

The ratio of the slave output voltage to the master voltage is a

function of the two dividers, as follows:

BOT

TRK

TOP

TRK

BOT

TOP

MASTER

SLAVE

The final TRKx pin voltage must be higher than 0.54 V. If the

TRK function is not used, connect the TRKx pin to INTVCC.

PARALLEL OPERATION

ADP2323 supports a two phase parallel operation to provide a

single output of 6 A. To configure the ADP2323 as a two phase

single output

1. Connect the FB2 pin to INTVCC, thereby disabling the

Channel 2 error amplifier.

2. Connect COMP1 to COMP2 and connect EN1 to EN2.

3. Use SS1 to set the soft start time and keep SS2 open.

During parallel operation, the voltages of PVIN1 and PVIN2

should be the same.

POWER GOOD

The power good (PGOODx) pin is an active high, open drain

output that indicates if the regulator output voltage is within

regulation. High indicates that the voltage at an FBx pin (and,

hence, the output voltage) is above 90% of the reference voltage.

Low indicates that the voltage at an FBx pin (and, hence, the

output voltage) is below 85% of the reference voltage. There is a

16-cycle deglitch time between FBx and PGOODx.

OVERVOLTAGE PROTECTION

The ADP2323 provides an overvoltage protection (OVP)

feature to protect the system against the output shorting to a

higher voltage supply or when a strong load transient occurs. If

the feedback voltage increases to 0.7 V, the internal high-side

MOSFET and low-side driver turn off until the voltage at the

FBx pin reduces to 0.63 V, at which time the ADP2323 resumes

normal operation.

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