LPC2104FBD48 datasheet(11/41 Pages) NXP

11 / 41 page

LPC2104_2105_2106_7

Product data sheet

Rev. 07 — 20 June 2008

11 of 41

NXP Semiconductors

LPC2104/2105/2106

Single-chip 32-bit microcontrollers

6.4 Memory map

The LPC2104/2105/2106 memory maps incorporate several distinct regions, as shown in

the following ﬁgures.

In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either

ﬂash memory (the default) or on-chip static RAM. This is described in Section 6.18

“System control”.

(1) LPC2104/2105/2106/01 only.

Fig 4.

LPC2104/2105/2106 memory map

AHB PERIPHERALS

APB PERIPHERALS

RESERVED ADDRESS SPACE

BOOT BLOCK (RE-MAPPED FROM

ON-CHIP FLASH MEMORY)

RESERVED ADDRESS SPACE

16 kB ON-CHIP STATIC RAM (LPC2104)

32 kB ON-CHIP STATIC RAM (LPC2105)

64 kB ON-CHIP STATIC RAM (LPC2106)

RESERVED ADDRESS SPACE

FAST GPIO REGISTERS(1)

128 kB ON-CHIP FLASH MEMORY

0xFFFF FFFF

0xF000 0000

0xEFFF FFFF

0xE000 0000

0xC000 0000

0xDFFF FFFF

0x8000 0000

0x7FFF FFFF

0x7FFF E000

0x7FFF DFFF

0x4000 4000

0x4000 3FFF

0x4000 8000

0x4000 7FFF

0x4001 0000

0x4000 FFFF

0x4000 0000

0x3FFF FFFF

0x3FFF C000

0x0002 0000

0x0001 FFFF

0x0000 0000

4.0 GB

3.75 GB

3.5 GB

3.0 GB

2.0 GB

1.0 GB

0.0 GB

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