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AM53CF94 数据表(PDF) 21 Page - Advanced Micro Devices

部件名 AM53CF94
功能描述  Enhanced SCSI-2 Controller (ESC)
PDF  76 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM53CF94 数据表(HTML) 21 Page - Advanced Micro Devices

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P R E L I M I N A R Y
AMD
21
Am53CF94/Am53CF96
STATREG – Bit 2 – MSG – Message
STATREG – Bit 1 – C/D – Command/Data
STATREG – Bit 0 – I/O – Input/Output
Bit2
Bit1
Bit0
MSG
C/D
I/O
SCSI Phase
1
1
1
Message In
1
1
0
Message Out
1
0
1
Reserved
1
0
0
Reserved
0
1
1
Status
0
1
0
Command
0
0
1
Data_In
0
0
0
Data_Out
The MSG, C/D and I/O bits together can be referred to
as the SCSI Phase bits. They indicate the phase of the
SCSI bus. These bits may be latched or unlatched
depending on whether or not the ENF bit in Control
Register Two is set.
In the latched mode the SCSI phase bits are latched at
the end of a command and the latch is opened when the
Interrupt Status Register (INSTREG) is read. In the un-
latched mode, they indicate the phase of the SCSI bus
when this register is read.
SCSI Destination ID Register (04H) Write
RES
RES
RES
RES
RES
00000
SCSI Destination ID Register
SDIDREG
Address: 04H
Type: Write
76543
210
DID2
DID1
DID0
xxx
Reserved
Reserved
Reserved
Reserved
SCSI Destination ID 2:0
Reserved
17348B-21
SDIDREG – Bits 7:3 – RES – Reserved
SDIDREG – Bits 2:0 – DID 2:0 – Destination ID 2:0
The DID 2:0 bits are the encoded SCSI ID of the device
on the SCSI bus which needs to be selected or
reselected.
At power-up the state of these bits is undefined. The DID
2:0 bits are not affected by reset.
DID2
DID1
DID0
SCSI ID
1117
1106
1015
1004
0113
0102
0011
0000



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