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AM79C940VCW 数据表(PDF) 2 Page - Advanced Micro Devices |
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AM79C940VCW 数据表(HTML) 2 Page - Advanced Micro Devices |
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2 / 122 page ![]() AMD 2 Am79C940 Additional features also enhance over-all system design. The individual transmit and receive FIFOs optimize system overhead, providing substantial latency during packet transmission and reception, and minimizing intervention during normal network error recovery. The integrated Manchester encoder/decoder eliminates the need for an external Serial Interface Adapter (SIA) in the node system. If support for an external encoding/decoding scheme is desired, the General Purpose Serial Interface (GPSI) allows direct access to/from the MAC. In addition, the Digital Attach- ment Interface (DAI), which is a simplified electrical attachment specification, allows implementation of MAUs that do not require DC isolation between the MAU and DTE. The DAI port can also be used to indicate transmit, receive, or collision status by connecting LEDs to the port. The MACE device also provides an External Address Detection Interface (EADI) to allow external hardware address filtering in internetworking applications. The Am79C940 MACE chip is offered in a Plastic Lead- less Chip Carrier (84-pin PLCC), a Plastic Quad Flat Package (100-pin PQFP), and a Thin Quad Flat Pack- age (TQFP 80-pin). There are several small functional and physical differences between the 80-pin TQFP and the 84-pin PLCC and 100-pin PQFP configurations. Because of the smaller number of pins in the TQFP con- figuration versus the PLCC configuration, four pins are not bonded out. Though the die is identical in all three package configurations, the removal of these four pins does cause some functionality differences between the TQFP and the PLCC and PQFP configurations. De- pending on the application, the removal of these pins will or will not have an effect. BLOCK DIAGRAM DBUS 15-0 ADD 4-0 R/ W CS FDS DTV EOF RDTREQ TDTREQ BE 1–0 INTR SCLK EDSEL TC SLEEP RESET 16235C-1 XTAL1 FIFO Control EADI Port Bus Interface Unit 802.3 MAC Core ENCODER/ DECODER (PLS) XMT FIFO RCV FIFO Command & Status Registers JTAG PORT CNTRL TCK TDI TMS TDO XTAL2 EADI Port Control AUI Port 10BASE-T MAU DAI Port GPSI Port DXCVR CLSN SRDCLK SRD SF/BD EAM/R DO ± DI ± CI ± TXD ± TXP ± RXD ± LNKST RXPOL TXDAT ± TXEN RXDAT RXCRS STDCLK TXDAT+ TXEN SRDCLK RXDAT RXCRS CLSN AUI 10BASE-T DAI Port GPSI Notes: 1. Only one of the network ports AUI, 10BASE-T, DAI port or GPSI can be active at any time. Some shared signals are active regardless of which network port is active, and some are reconfigured. 2. The EADI port is active at all times. |
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