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AMC004CFLKA 数据表(PDF) 33 Page - Advanced Micro Devices |
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AMC004CFLKA 数据表(HTML) 33 Page - Advanced Micro Devices |
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33 / 42 page ![]() 5/4/98 AmC0XXCFLKA 33 AC CHARACTERISTICS Write/Erase/Program Operations Notes: 1. Rise/Fall ð 10 ns. 2. Maximum specification not needed due to the devices internal stop timer that will stop any erase or write operation that exceed the device specification. 3. Embedded Program Operation of 16 µs consist of 10 µs program pulse and 6 µs write recovery before read. This is the minimum time for one pass through the programming algorithm. D5 = “1” only after a byte takes longer than 48 ms to Write. Card Speed Parameter Symbol Parameter Description -150 ns Unit JEDEC Standard Min Typ Max tAVAV tWC Write Cycle Time 150 ns tAVWL tAS Address Setup Time 20 ns tWLAX tAH Address Hold Time 55 ns tDVWH tDS Data Setup Time 50 ns tWHDX tDH Data Hold Time 20 ns tOEH Output Enable Hold Time for Embedded Algorithm 20 ns tWHGL tWR Write Recovery Time before Read 6 µs tGHWL Read Recovery Time before Write 0 µs tWLOZ Output in High-Z from Write Enable 5 ns tWHOZ Output in Low-Z from Write Enable 60 ns tELWL tCS CE Setup Time 0 ns tWHEH tCH CE Hold Time 20 ns tWLWH tWP Write Pulse Width 45 ns tWHWL tWPH Write Pulse Width HIGH 50 ns tWHWH3 Embedded Programming Operation (Notes 1, 2, 3) 16 µs 48 ms tWHWH4 Embedded Erase Operation for each 64K Byte Memory Sector (Notes 1, 2) 1.5 s tVCS VCC Setup Time to CE LOW 50 µs |
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