ST8024LACDR datasheet(7/35 Pages) STMICROELECTRONICS

7 / 35 page

ST8024L

Pin configuration

Doc ID 17709 Rev 5

7/35

Pin configuration

Figure 2.

Pin connections

Table 2.

Pin description

Symbol

Name and function

SO-28/

TSSOP-28

TSSOP-20

CLKDIV1

Control of CLK frequency

(internal 11 k

Ω pull-up resistor connected to VDD)

1N. A.

CLKDIV2

Control of CLK frequency

(internal 11 k

Ω pull-down resistor connected to GND)

2N. A.

5V/3V

5 V or 3 V VCC selection for communication with the smartcard. Logic high

selects 5 V operation and logic low selects 3 V operation (for ST8024LACDR,

ST8024LACTR, and ST8024LTR: if the 1.8V pin is logic high, the 5V/3V pin is

a “don't care”). See Table 23 for a description of the VCC selection settings.

PGND

Power ground for step-up converter

C1+

External capacitor step-up converter

VDDP

Power supply for step-up converter

C1–

External capacitor step-up converter

VUP

Output of step-up converter

PRES

Card presence input (active low) - bonding option

N. A.

PRES

Card presence input (active high)

I/O

Data line to and from card (C7)

(internal 11 k

Ω pull-up resistor connected to VCC)

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