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PIC16LF1906-IPTQTP 数据表(PDF) 32 Page - Microchip Technology |
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PIC16LF1906-IPTQTP 数据表(HTML) 32 Page - Microchip Technology |
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32 / 288 page  PIC16LF1904/6/7 DS41569A-page 32 Preliminary 2011 Microchip Technology Inc. Bank 2 10Ch LATA PORTA Data Latch xxxx xxxx uuuu uuuu 10Dh LATB PORTB Data Latch xxxx xxxx uuuu uuuu 10Eh LATC PORTC Data Latch xxxx xxxx uuuu uuuu 10Eh LATD(3) PORTD Data Latch xxxx xxxx uuuu uuuu 10Eh LATE(3) — — — — — LATE2 LATE1 LATE0 ---- -xxx ---- -uuu 111h to 115h — Unimplemented — — 116h BORCON SBOREN BORFS — — — — — BORRDY 10-- ---q uu-- ---u 117h FVRCON FVREN FVRRDY TSEN TSRNG — — ADFVR1 ADFVR0 0q00 --00 0q00 --00 118h to 11Fh — Unimplemented — — Bank 3 18Ch ANSELA — — ANSA5 — ANSA3 ANSA2 ANSA1 ANSA0 --1- 1111 --11 1111 18Dh ANSELB — — ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0 --11 1111 --11 1111 18Eh — Unimplemented — — 18Fh — Unimplemented — — 190h ANSELE(3) — — — — — ANSE2 ANSE1 ANSE0 ---- -111 ---- -111 191h PMADRL Program Memory Address Register Low Byte 0000 0000 0000 0000 192h PMADRH — Program Memory Address Register High Byte 1000 0000 1000 0000 193h PMDATL Program Memory Read Data Register Low Byte xxxx xxxx uuuu uuuu 194h PMDATH — — Program Memory Read Data Register High Byte --xx xxxx --uu uuuu 195h PMCON1 —(2) CFGS LWLO FREE WRERR WREN WR RD 1000 x000 1000 q000 196h PMCON2 Program Memory Control Register 2 0000 0000 0000 0000 197h — Unimplemented — — 198h — Unimplemented — — 199h RCREG USART Receive Data Register 0000 0000 0000 0000 19Ah TXREG USART Transmit Data Register 0000 0000 0000 0000 19Bh SPBRG BRG<7:0> 0000 0000 0000 0000 19Ch SPBRGH BRG<15:8> 0000 0000 0000 0000 19Dh RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x 19Eh TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010 19Fh BAUD1CON ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN 01-0 0-00 01-0 0-00 Bank 4 20Ch — Unimplemented — — 20Dh WPUB WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0 1111 1111 1111 1111 20Eh — Unimplemented — — 20Fh — Unimplemented — — 210h WPUE — — — — WPUE3 — — — ---- 1--- ---- 1--- 211h to 21Fh — Unimplemented — — Bank 5 28Ch — 29Fh — Unimplemented — — Bank 6 30Ch — 31Fh — Unimplemented — — TABLE 3-5: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: These registers can be addressed from any bank. 2: Unimplemented, read as ‘1’. 3: PIC16LF1904/7 only. |
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