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PIC16LF1906-ISOSQTP 数据表(PDF) 74 Page - Microchip Technology |
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PIC16LF1906-ISOSQTP 数据表(HTML) 74 Page - Microchip Technology |
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74 / 288 page  PIC16LF1904/6/7 DS41569A-page 74 Preliminary 2011 Microchip Technology Inc. 7.6.3 PIE2 REGISTER The PIE2 register contains the interrupt enable bits, as shown in Register 7-3. Note: Bit PEIE of the INTCON register must be set to enable any peripheral interrupt. REGISTER 7-3: PIE2: PERIPHERAL INTERRUPT ENABLE REGISTER 2 U-0 U-0 U-0 U-0 U-0 R/W-0/0 U-0 U-0 — — — — — LCDIE — — bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets ‘1’ = Bit is set ‘0’ = Bit is cleared bit 7-3 Unimplemented: Read as ‘0’ bit 2 LCDIE: LCD Module Interrupt Enable bit 1 = Enables the LCD module interrupt 0 = Disables the LCD module interrupt bit 1-0 Unimplemented: Read as ‘0’ |
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