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LP61L256C 数据表(PDF) 6 Page - AMIC Technology |
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LP61L256C 数据表(HTML) 6 Page - AMIC Technology |
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6 / 11 page ![]() LP61L256C Series PRELIMINARY (November, 2001, Version 0.0) 5 AMIC Technology, Inc. AC Characteristics (continued) Symbol Parameter LP61L256C-12 LP61L256C-15 Unit Min. Max. Min. Max Write Cycle tWC Write Cycle Time 12 - 15 - ns tCW Chip Enable to End of Write 10 - 12 - ns tAS Address Setup Time of Write 0 - 0 - ns tAW Address Valid to End of Write 10 - 12 - ns tWP Write Pulse Width 10 - 12 - ns tWR Write Recovery Time 0 - 0 - ns tWHZ Write to Output in High Z 0 6 0 8 ns tDW Data to Write Time Overlap 6 - 7 - ns tDH Data Hold from Write Time 0 - 0 - ns tOW Output Active from End of Write 3 - 3 - ns Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not referred to output voltage levles. Timing Waveforms Read Cycle 1 (1) tRC Address DOUT tAA tOE tOLZ5 tACE tCLZ5 tCHZ5 tOH OE tOHZ5 CE |
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