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STM32F415RG 数据表(PDF) 177 Page - STMicroelectronics |
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STM32F415RG 数据表(HTML) 177 Page - STMicroelectronics |
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177 / 186 page ![]() DocID022063 Rev 4 177/186 STM32F415xx, STM32F417xx Revision history 8 Revision history Table 98. Document revision history Date Revision Changes 15-Sep-2011 1 Initial release. 24-Jan-2012 2 Added WLCSP90 package on cover page. Renamed USART4 and USART5 into UART4 and UART5, respectively. Updated number of USB OTG HS and FS in Table 2: STM32F415xx and STM32F417xx: features and peripheral counts. Updated Figure 3: Compatible board design between STM32F10xx/STM32F2xx/STM32F4xx for LQFP144 package and Figure 4: Compatible board design between STM32F2xx and STM32F4xx for LQFP176 and BGA176 packages, and removed note 1 and 2. Updated Section 2.2.9: Flexible static memory controller (FSMC). Modified I/Os used to reprogram the Flash memory for CAN2 and USB OTG FS in Section 2.2.13: Boot modes. Updated note in Section 2.2.14: Power supply schemes. PDR_ON no more available on LQFP100 package. Updated Section 2.2.16: Voltage regulator. Updated condition to obtain a minimum supply voltage of 1.7 V in the whole document. Renamed USART4/5 to UART4/5 and added LIN and IrDA feature for UART4 and UART5 in Table 5: USART feature comparison. Removed support of I2C for OTG PHY in Section 2.2.30: Universal serial bus on-the-go full-speed (OTG_FS). Added Table 6: Legend/abbreviations used in the pinout table. Table 7: STM32F41x pin and ball definitions: replaced VSS_3, VSS_4, and VSS_8 by VSS; reformatted Table 7: STM32F41x pin and ball definitions to better highlight I/O structure, and alternate functions versus additional functions; signal corresponding to LQFP100 pin 99 changed from PDR_ON to VSS; EVENTOUT added in the list of alternate functions for all I/Os; ADC3_IN8 added as alternate function for PF10; FSMC_CLE and FSMC_ALE added as alternate functions for PD11 and PD12, respectively; PH10 alternate function TIM15_CH1_ETR renamed TIM5_CH1; updated PA4 and PA5 I/O structure to TTa. Removed OTG_HS_SCL, OTG_HS_SDA, OTG_FS_INTN in Table 7: STM32F41x pin and ball definitions and Table 9: Alternate function mapping. Changed TCM data RAM to CCM data RAM in Figure 18: STM32F41x memory map. Added IVDD and IVSS maximum values in Table 12: Current characteristics. Added Note 1 related to fHCLK, updated Note 2 in Table 14: General operating conditions, and added maximum power dissipation values. Updated Table 15: Limitations depending on the operating power supply range. |
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