STM32F207VC datasheet(122/178 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32F20xxx

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DocID15818 Rev 11

Equation 1: RAIN max formula

The formula above (Equation 1) is used to determine the maximum external impedance

allowed for an error below 1/4 of LSB. N = 12 (from 12-bit resolution) and k is the number of

sampling periods defined in the ADC_SMPR1 register.

Note:

ADC accuracy vs. negative injection current: injecting a negative current on any analog

input pins should be avoided as this significantly reduces the accuracy of the conversion

fS(3)

Sampling rate

(fADC = 30 MHz)

12-bit resolution

Single ADC

Msps

12-bit resolution

Interleave Dual ADC

mode

3.75

Msps

12-bit resolution

Interleave Triple ADC

mode

Msps

IVREF+(3)

ADC VREF DC current

consumption in conversion mode

-300

500

µA

IVDDA(3)

ADC VDDA DC current

consumption in conversion mode

-1.6

1.8

1. On devices in WLCSP64+2 package, if IRROFF is set to VDD, the supply voltage can drop to 1.7 V when the device

operates in the 0 to 70 °C temperature range using an external power supply supervisor (see Section 3.16).

2. It is recommended to maintain the voltage difference between VREF+ and VDDA below 1.8 V.

3. Based on characterization, not tested in production.

4. VREF+ is internally connected to VDDA and VREF- is internally connected to VSSA.

5. RADC maximum value is given for VDD=1.8 V, and minimum value for VDD=3.3 V.

6. For external triggers, a delay of 1/fPCLK2 must be added to the latency specified in Table 66.

Table 66. ADC characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 67. ADC accuracy (1)

1. Better performance could be achieved in restricted VDD, frequency and temperature ranges.

Symbol

Parameter

Test conditions

Typ

Max(2)

2. Based on characterization, not tested in production.

Unit

Total unadjusted error

fPCLK2 = 60 MHz,

fADC = 30 MHz, RAIN < 10 kΩ,

VDDA = 1.8(3) to 3.6 V

3. On devices in WLCSP64+2 package, if IRROFF is set to VDD, the supply voltage can drop to 1.7 V when

the device operates in the 0 to 70 °C temperature range using an external power supply supervisor (see

Section 3.16).

±2

±5

LSB

Offset error

±1.5

±2.5

Gain error

±1.5

±3

Differential linearity error

±1

±2

Integral linearity error

±1.5

±3

RAIN

k0.5

–

()

fADC CADC

()

--------------------------------------------------------------

RADC

–

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