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SPC5643AF0MLU2 数据表(PDF) 61 Page - Freescale Semiconductor, Inc

部件名 SPC5643AF0MLU2
功能描述  MPC5644A Microcontroller Data Sheet
PDF  138 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

SPC5643AF0MLU2 数据表(HTML) 61 Page - Freescale Semiconductor, Inc

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MPC5644A Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
61
BOOTCFG[0:1]
SIU - Configuration
Two BOOTCFG signals are implemented in MPC5644A MCUs.
The BAM program uses the BOOTCFG0 bit to determine where
to read the reset configuration word, and whether to initiate a
FlexCAN or eSCI boot.
The BOOTCFG1 pin is sampled during the assertion of the
RSTOUT signal, and the value is used to update the RSR and
the BAM boot mode
See the MPC5644A Microcontroller Reference Manual for more
information.
The following values are for BOOTCFG[0:1}:
00:Boot from internal flash memory
01:FlexCAN/eSCI boot
10:Boot from external memory using EBI
11:Reserved
Note: For the 176-pin QFP and 208-ball BGA packages
BOOTCFG[0] is always 0 since the EBI interface is not available.
WKPCFG
SIU - Configuration
The WKPCFG pin is applied at the assertion of the internal reset
signal (assertion of RSTOUT), and is sampled 4 clock cycles
before the negation of the RSTOUT pin.
The value is used to configure whether the eTPU and eMIOS
pins are connected to internal weak pull up or weak pull down
devices after reset. The value latched on the WKPCFG pin at
reset is stored in the Reset Status Register (RSR), and is
updated for all reset sources except the Debug Port Reset and
Software External Reset.
0: Weak pulldown applied to eTPU and eMIOS pins at reset
1: Weak pullup applied to eTPU and eMIOS pins at reset.
ETRIG[2:3]
SIU - eQADC Triggers
External signal eTRIGx triggers eQADC CFIFOx
GPIO[206] ETRIG0
(Input)
SIU - eQADC Triggers
External signal eTRIGx triggers eQADC CFIFOx
GPIO[207] ETRIG1
(Input)
SIU - eQADC Triggers
External signal eTRIGx triggers eQADC CFIFOx
IRQ[0:5]
IRQ[7:15]
SIU - External Interrupts The IRQ[0:15] pins connect to the SIU IRQ inputs. IMUX Select
Register 1 is used to select the IRQ[0:15] pins as inputs to the
IRQs.
See the MPC5644A Microcontroller Reference Manual for more
information.
NMI
SIU - External Interrupts Non-Maskable Interrupt
Table 5. Signal details (continued)
Signal
Module or Function
Description



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