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SPC5643AF0MLU2 数据表(PDF) 100 Page - Freescale Semiconductor, Inc

部件名 SPC5643AF0MLU2
功能描述  MPC5644A Microcontroller Data Sheet
PDF  138 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

SPC5643AF0MLU2 数据表(HTML) 100 Page - Freescale Semiconductor, Inc

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MPC5644A Microcontroller Data Sheet, Rev. 7
Freescale Semiconductor
100
The tool/debugger must provide at least one TCK clock for the EVTI signal to be
recognized by the MCU. When using the RDY signal to indicate the end of a Nexus
read/write access, ensure that TCK continues to run for at least 1 TCK after leaving the
Update-DR state. This can be just a TCK with TMS low while in the Run-Test/Idle state or
by continuing with the next Nexus/JTAG command. Expect the affect of EVTI and RDY
to be delayed by edges of TCK. Note: RDY is not available in all packages of all devices.
Figure 11. JTAG test clock input timing
TCK
1
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2
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3



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