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SPC5643AF0MLU2 数据表(PDF) 75 Page - Freescale Semiconductor, Inc |
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SPC5643AF0MLU2 数据表(HTML) 75 Page - Freescale Semiconductor, Inc |
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75 / 138 page  MPC5644A Microcontroller Data Sheet, Rev. 7 Freescale Semiconductor 75 3.6.1 Voltage regulator controller (VRC) electrical specifications 8a — CC C Variation of LVI for rising 5V VDDREG supply at power-on reset Lvi5p0 - 6% Lvi5p0 Lvi5p0 + 6% V 8b — CC C Variation of LVI for rising 5V VDDREG supply power-on reset Lvi5p0 - 3% Lvi5p0 Lvi5p0 + 3% V 8c — CC C Trimming step LVI 5 V — 20 — mV 8d Lvi5p0_h CC C LVI 5 V hysteresis — 60 — mV 9 Por5V_r CC C Nominal POR for rising 5 V VDDREG supply —2.67 — V 9a — CC C Variation of POR for rising 5V VDDREG supply Por5V_r - 35% Por5V_r Por5V_r + 50% V 9b Por5V_f CC C Nominal POR for falling 5 V VDDREG supply —2.47 — V 9c — CC C Variation of POR for falling 5V VDDREG supply Por5V_f - 35% Por5V_f Por5V_f + 50% V 1 Using external ballast transistor. 2 Min range is extended to 10% since Lvi1p2 is reprogrammed from 1.2 V to 1.16 V after power-on reset. 3 LVI for falling supply is calculated as LVI rising – LVI hysteresis. 4 Lvi1p2 tracks DC target variation of internal Vdd regulator. Minimum and maximum Lvi1p2 correspond to minimum and maximum Vdd DC target respectively. 5 Minimum loading (<10 mA) for reading trim values from flash, powering internal RC oscillator, and IO consumption during POR. 6 No external load is allowed, except for use as a reference for an external tool. 7 This value is valid only when the internal regulator is bypassed. When the internal regulator is enabled, the maximum external load allowed on the Nexus pads is 30 pF at 40 MHz. 8 Lvi3p3 tracks DC target variation of internal Vdd33 regulator. Minimum and maximum Lvi3p3 correspond to minimum and maximum Vdd33 DC target respectively. Table 16. VRC electrical specifications Symbol Parameter Min. Max. Units IVRCCTL1 1 IVRCCTL is measured at the following conditions: VDD = 1.35 V, VRC33 = 3.1 V, VVRCCTL = 2.2 V. Current can be sourced by VRCCTL at Tj: 25 oCTBD — mA 150 oCTBD — mA BETA 2 Required gain at Tj: IDD IVRCCTL (fsys = fMAX) 1,3,4 – 40 oCTBD — — 25 oC TBD —— 150 oC TBD TBD — Table 15. PMC Electrical Characteristics (continued) ID Name Parameter Min Typ Max Unit Notes |
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