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MPC8347ECVRALDB 数据表(PDF) 72 Page - Freescale Semiconductor, Inc |
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MPC8347ECVRALDB 数据表(HTML) 72 Page - Freescale Semiconductor, Inc |
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72 / 99 page  MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12 72 Freescale Semiconductor Package and Pin Listings TSEC1_RX_CLK U26 I LVDD1 — TSEC1_RX_DV U24 I LVDD1 — TSEC1_RX_ER/GPIO2[26] L28 I/O OVDD — TSEC1_RXD[7:4]/GPIO2[22:25] M27, M28, N26, N27 I/O OVDD — TSEC1_RXD[3:0] W26, W24, Y28, Y27 I LVDD1 — TSEC1_TX_CLK N25 I OVDD — TSEC1_TXD[7:4]/GPIO2[27:30] N28, P25, P26, P27 I/O OVDD — TSEC1_TXD[3:0] V28, V27, V26, W28 O LVDD1 10 TSEC1_TX_EN W27 O LVDD1 — TSEC1_TX_ER/GPIO2[31] N24 I/O OVDD — Three-Speed Ethernet Controller (Gigabit Ethernet 2) TSEC2_COL/GPIO1[21] P28 I/O OVDD — TSEC2_CRS/GPIO1[22] AC28 I/O LVDD2 — TSEC2_GTX_CLK AC27 O LVDD2 — TSEC2_RX_CLK AB25 I LVDD2 — TSEC2_RX_DV/GPIO1[23] AC26 I/O LVDD2 — TSEC2_RXD[7:4]/GPIO1[26:29] R28, T24, T25, T26 I/O OVDD — TSEC2_RXD[3:0]/GPIO1[13:16] AA25, AA26, AA27, AA28 I/O LVDD2 — TSEC2_RX_ER/GPIO1[25] R25 I/O OVDD — TSEC2_TXD[7]/GPIO1[31] T27 I/O OVDD — TSEC2_TXD[6]/DR_XCVR_TERM_SEL T28 O OVDD — TSEC2_TXD[5]/DR_UTMI_OPMODE1 U28 O OVDD — TSEC2_TXD[4]/DR_UTMI_OPMODE0 U27 O OVDD — TSEC2_TXD[3:0]/GPIO1[17:20] AB26, AB27, AA24, AB28 I/O LVDD2 — TSEC2_TX_ER/GPIO1[24] R27 I/O OVDD — TSEC2_TX_EN/GPIO1[12] AD28 I/O LVDD2 3 TSEC2_TX_CLK/GPIO1[30] R26 I/O OVDD — DUART UART_SOUT[1:2]/MSRCID[0:1]/LSRCID[0:1] B4, A4 O OVDD — UART_SIN[1:2]/MSRCID[2:3]/LSRCID[2:3] D5, C5 I/O OVDD — UART_CTS[1]/MSRCID4/LSRCID4 B5 I/O OVDD — UART_CTS[2]/MDVAL/LDVAL A5 I/O OVDD — UART_RTS[1:2] D6, C6 O OVDD — Table 56. MPC8347EA (PBGA) Pinout Listing (continued) Signal Package Pin Number Pin Type Power Supply Notes |
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