PIC16F882-I datasheet(49/328 Pages) MICROCHIP

49 / 328 page

DS41291F-page 47

PIC16F882/883/884/886/887

3.3

PORTB and TRISB Registers

PORTB is an 8-bit wide, bidirectional port. The

corresponding

data

direction

TRISB

(Register 3-6). Setting a TRISB bit (= 1) will make the

corresponding PORTB pin an input (i.e., put the

corresponding output driver in a High-Impedance mode).

Clearing a TRISB bit (= 0) will make the corresponding

PORTB pin an output (i.e., enable the output driver and

put the contents of the output latch on the selected pin).

Example 3-3 shows how to initialize PORTB.

Reading the PORTB register (Register 3-5) reads the

status of the pins, whereas writing to it will write to the

PORT latch. All write operations are read-modify-write

operations. Therefore, a write to a port implies that the

port pins are read, this value is modified and then written

to the PORT data latch.

The TRISB register (Register 3-6) controls the PORTB

pin output drivers, even when they are being used as

analog inputs. The user should ensure the bits in the

TRISB register are maintained set when using them as

analog inputs. I/O pins configured as analog input always

read ‘0’. Example 3-3 shows how to initialize PORTB.

EXAMPLE 3-3:

INITIALIZING PORTB

3.4

Additional PORTB Pin Functions

PORTB pins RB<7:0> on the device family device have

an interrupt-on-change option and a weak pull-up

option. The following three sections describe these

PORTB pin functions.

Every PORTB pin on this device family has an

interrupt-on-change option and a weak pull-up option.

3.4.1

ANSELH REGISTER

The ANSELH register (Register 3-4) is used to

configure the Input mode of an I/O pin to analog.

Setting the appropriate ANSELH bit high will cause all

digital reads on the pin to be read as ‘0’ and allow

analog functions on the pin to operate correctly.

The state of the ANSELH bits has no affect on digital

output functions. A pin with TRIS clear and ANSELH

set will still operate as a digital output, but the Input

mode will be analog. This can cause unexpected

behavior

when

executing

read-modify-write

instructions on the affected port.

3.4.2

WEAK PULL-UPS

Each of the PORTB pins has an individually configurable

internal weak pull-up. Control bits WPUB<7:0> enable or

disable each pull-up (see Register 3-7). Each weak

pull-up is automatically turned off when the port pin is

configured as an output. All pull-ups are disabled on a

Power-on Reset by the RBPU bit of the OPTION register.

3.4.3

INTERRUPT-ON-CHANGE

All of the PORTB pins are individually configurable as an

interrupt-on-change pin. Control bits IOCB<7:0> enable

or disable the interrupt function for each pin. Refer to

The

interrupt-on-change

feature

disabled on a Power-on Reset.

For enabled interrupt-on-change pins, the present value

is compared with the old value latched on the last read

of PORTB to determine which bits have changed or

mismatched the old value. The ‘mismatch’ outputs of

the last read are OR’d together to set the PORTB

Change Interrupt flag bit (RBIF) in the INTCON register.

This interrupt can wake the device from Sleep. The user,

in the Interrupt Service Routine, clears the interrupt by:

Any read or write of PORTB. This will end the

mismatch condition.

Clear the flag bit RBIF.

A mismatch condition will continue to set flag bit RBIF.

Reading or writing PORTB will end the mismatch

condition and allow flag bit RBIF to be cleared. The latch

holding the last read value is not affected by a MCLR nor

Brown-out Reset. After these Resets, the RBIF flag will

continue to be set if a mismatch is present.

Note:

The ANSELH register must be initialized

to configure an analog channel as a digital

input. Pins configured as analog inputs will

read ‘0’.

BANKSEL PORTB

;

CLRF

PORTB

;Init PORTB

BANKSEL TRISB

;

MOVLW

B‘11110000’ ;Set RB<7:4> as inputs

;and RB<3:0> as outputs

MOVWF

TRISB

;

Note:

If a change on the I/O pin should occur when

the read operation is being executed (start of

the Q2 cycle), then the RBIF interrupt flag

may not get set. Furthermore, since a read

or write on a port affects all bits of that port,

care must be taken when using multiple pins

in Interrupt-on-Change mode. Changes on

one pin may not be seen while servicing

changes on another pin.

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