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PIC16F882-I 数据表(PDF) 62 Page - Microchip Technology |
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PIC16F882-I 数据表(HTML) 62 Page - Microchip Technology |
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62 / 328 page ![]() PIC16F882/883/884/886/887 DS41291F-page 60 © 2009 Microchip Technology Inc. 3.7.1 RE0/AN5(1) This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC 3.7.2 RE1/AN6(1) This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC 3.7.3 RE2/AN7(1) This pin is configurable to function as one of the following: • a general purpose I/O • an analog input for the ADC FIGURE 3-21: BLOCK DIAGRAM OF RE<2:0> 3.7.4 RE3/MCLR/VPP Figure 3-22 shows the diagram for this pin. This pin is configurable to function as one of the following: • a general purpose input • as Master Clear Reset with weak pull-up FIGURE 3-22: BLOCK DIAGRAM OF RE3 TABLE 3-5: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE Note 1: RE0/AN5 is available on PIC16F884/887 only. Note 1: RE1/AN6 is available on PIC16F884/887 only. Note 1: RE2/AN7 is available on PIC16F884/887 only. I/O Pin VDD VSS D Q CK Q D Q CK Q Analog(1) Input Mode Data Bus RD PORTE WR PORTE WR TRISE RD TRISE To A/D Converter Note 1: ANSEL determines Analog Input mode. Input VSS Data Bus RD PORTE Reset MCLRE RD TRISE VSS MCLRE VDD Weak MCLRE Pin Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets ANSEL ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0 1111 1111 1111 1111 PORTE — — — — RE3 RE2 RE1 RE0 ---- xxxx ---- uuuu TRISE — — — — TRISE3 TRISE2 TRISE1 TRISE0 ---- 1111 ---- 1111 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by PORTE |
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