AS3909 datasheet(21/77 Pages) AMSCO

21 / 77 page

ams Datasheet, Confidential: 2013-Oct [3-02]

AS3909/AS3910 – 21

Appl icatio n I n f o rm a t i o n

Power Supply, Regulators

The AS3909/10 includes two regulators which can be adjusted

automatically to improve the reader PSRR. VDD is an external

power supply pin. It is used to supply the logic and digital pins.

One regulator is used to supply analog blocks (VSP_A), another

is there just for transmitter (VSP_RF) in order to decouple

transmitter current spikes from the rest of the IC. All negative

power supply pins are externally connected to the same

negative supply, the reason for separation is in decoupling of

noise induced by voltage drops on the internal power supply

lines. These pins are VSS (die substrate potential), VSN_D

(negative supply of logic and digital pads), VSN_A (negative

supply of analog blocks) and VSN_RF (negative supply of

transmitter).

An additional regulator block provides AGD voltage (1.5V)

which is used as reference potential for analog processing

(analog ground).

Blocking capacitors have to be connected externally to

regulator outputs and AGD pins. For pins VSP_A and VSP_RF

recommended blocking capacitors are 2.2μF in parallel with

10nF, for pin AGD 1μF in parallel with 10nF is suggested.

The regulated voltage range is from 2.4V to 3.4V with step of

100mV. Both regulators are set to the same voltage. VSP_A

regulator maximum capability is 20mA while maximum

capability of VSP_RF regulator is 300mA. VSP_RF regulator also

has a built in protection which limits current to max 300mA in

normal operation and to max 500 mA in case of a short.

The regulators are operating when either the Operating Control

regulators are not operating, VSP_A and VSP_RF are connected

to VDD through 1kΩ resistors. Connection through resistors

assures smooth power up of the system and a smooth

transitions from Stand-by mode to other operating modes. In

case regulators were regulating or were transparent at power

up a huge current would be pulled from VDD supply to charge

blocking capacitors of regulated outputs which is especially

problematic for battery powered systems.

At power up the regulated voltage is set to maximum voltage

(3.4V).

The regulator voltage can then be set automatically or

“manually”. Automatic procedure is started by sending the

direct command Adjust Regulators. In this procedure regulated

voltage is set 250mV below VDD. This procedure assures that

reader operates with maximum possible power while still

assuring good PSRR.

Regulator operation can be controlled and observed by writing

and reading two Regulator registers.

Regulator Display Register (#15) is a read only register which

displays actual regulated voltage when regulator is operating.

In Power-down mode its content is forced to 00.

AS3909 数据表(PDF) 21 Page - ams AG

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