AS3909 datasheet(55/77 Pages) AMSCO

55 / 77 page

ams Datasheet, Confidential: 2013-Oct [3-02]

AS3909/AS3910 – 55

Appl icatio n I n f o rm a t i o n

the FIFO Status Register displays the number of bytes in the FIFO

so the microcontroller can proceeded with downloading the

data.

In case there was an error or bit collision detected during

reception, an interrupt with appropriate flag is sent.

Microcontroller has to take appropriate action.

In case of an error it usually repeats the command; it can also

check the RSSI level in the Receiver State Display Register and

change the AM/ PM mode in case the RSSI is low.

In case of a bit collision it will consult the Collision Register to

determine in which bit there was collision.

Transmit and Receive In Case Data Packet is Longer Than

FIFO

In case a data packet is longer than FIFO the sequence explained

above is modified.

Before transmit the FIFO is filled. During transmit an interrupt

is sent when remaining number of bytes is lower than the water

level (INTR due to FIFO water level). The microcontroller in turn

adds more data in the FIFO. When all the data is transmitted an

interrupt is sent to inform the microcontroller that transmission

is finished.

During reception situation is similar. In case the FIFO is loaded

with more data than the receive water level, an interrupt is sent

and the microcontroller in turn reads the data from the FIFO

(additionally to the interrupt the FIFO Status Register displays

the number of bytes which were not read out). When reception

is finished an interrupt is sent to the microcontroller (INTR due

to end of receive), additionally the FIFO Status Register displays

the number of bytes in the FIFO which are still to be read out.

NFCIP-1 Operation

Only the NFCIP-1 106 kbps active mode is supported.

For operation in this mode, the bit nfc has to be set in the ISO

Mode Definition Register.

Next the NFCIP Field Detection Threshold Register (address #14)

has to be written to define the thresholds for Target activation

and RF Collision avoidance (see “External Field Detector” on

page 19).

Please note that in the NFC mode the transmitter enable bit

(tx_en) is never set in the Operation Control Register. The

transmitter is activated automatically by the NFC transmit

commands).

NFCIP Target

The AS3909/10 enters in the Initial NFC Target mode by setting

the nfc_t bit in the Operation Control Register. In this low power

mode only the Target Activation Detector is running.

AS3909 数据表(PDF) 55 Page - ams AG

AS3909 数据表(HTML) 55 Page - ams AG

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