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AS3909 数据表(PDF) 36 Page - ams AG |
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AS3909 数据表(HTML) 36 Page - ams AG |
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36 / 77 page ![]() AS3909/AS3910 – 36 ams Datasheet, Confidential: 2013-Oct [3-02] A p pl i c at io n I n f o r m at i o n Configuration Registers Figure 24: Configuration Register 2 Note: Default setting is set at power up and after Set Default command. Address # 02: Configuration Register 2 Type: RW Bit Name Def. Function Comments 7sing 0 1 → only RFO1 driver will be used Choose between single and differential driving of antenna. 6envi 0 1 → input applied to RFI1 is envelope RF envelope input 5 tf2 0 1 → reduces the gain for 11 dB in first stage after peak detector When both bits are set there is 17 dB gain reduction in first stage 4 tf1 0 1 → reduces the gain for 6 dB in first stage after peak detector 3osc 0 0 → 13.56MHz Xtal, 1 → 27.12MHz Xtal Selector for crystal oscillator 2out_cl1 0 out_cl1 out_cl0 out_cl Selection of clock frequency on MCU_CLK output. In case of “11”, MCU_CLK output is permanently low. 1 out_cl0 0 0 0 3.39MHz 0 1 6.78 MHZ 1 0 13.56 MHZ 11 no output 0Not used |
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