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AS8002 数据表(PDF) 12 Page - ams AG |
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AS8002 数据表(HTML) 12 Page - ams AG |
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12 / 25 page ![]() www.austriamicrosystems.com/AS8002 Revision 1.1 11 - 24 AS8002 Data Sheet - D e t a i l e d D e s c r i p t i o n Figure 5. Read Mode The interface of the AS8002 corresponds to a 4-wire SPI where each data transfer is composed of 16 bits. Each 16-bit transfer of the SDI is divided into a 7-bit address word indicating the target register, one R/W bit indicating the operation to be done and a 8-bit word data indicating the data to be written. The data transferred in SDO is also composed of 16 bits. These can be divided into the 8 MSBs which correspond to the 8 MSBs of the last conversion run by the ADC plus 8 LSBs which clock out the data that has been requested by the SDI in that same cycle. This allows for a given read register to be addressed and read in the same 16-bit transfer. 7.4 SPI Hardware Connection Figure 6 shows a basic interconnection diagram of an AS8002 device with a host controller. Data transmission is enabled with signal SCSB (SS/ ), the serial clock is applied at pin SCLK (SCK). Data is shifted into the AS8002 via signal SDI (MOSI) and read from the AS8002 via signal SDO (MISO). Figure 6. AS8002 and the Controller 65 0 1 2 3 4 65 0 1 2 3 4 7 65 0 1 2 3 4 addr[6:0] read_meas_MSB[7:0] R/W data_addr[7:0] SCSB SCLK SDI SDO MOSI MISO SCK SS/ SDO SDI SCLK SCSB |
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