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OPA830TDBVREP 数据表(PDF) 5 Page - National Semiconductor (TI) |
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OPA830TDBVREP 数据表(HTML) 5 Page - National Semiconductor (TI) |
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5 / 36 page ![]() OPA830-EP www.ti.com SBOS655 – MARCH 2014 Electrical Characteristics, VS = ±5V (continued) At -40°C ≤ TJ ≤ 105°C, G = +2, RF = 750Ω, and RL = 150Ω to GND, unless otherwise noted (see Figure 52). OPA830TDBV PARAMETER CONDITIONS UNIT MIN TYP MAX DC PERFORMANCE (2) RL = 150Ω Open-Loop Voltage Gain 64 74 dB Input Offset Voltage ±1.5 ±8.6 mV Average Offset Voltage Drift ±35 μV/°C Input Bias Current VCM = 0V 5 13 μA Input Bias Current Drift ±12 nA/°C Input Offset Current VCM = 0V ±0.1 ±1.49 μA Input Offset Current Drift ±5 nA/°C INPUT Negative Input Voltage(3) –5.5 –5.1 V Positive Input Voltage(3) 2.8 3.2 V Common-Mode Rejection Ratio (CMRR) Input-Referred 72 80 dB Input Impedance Differential Mode 10 || 2.1 k Ω || pF Common-Mode 400 || 1.2 k Ω || pF OUTPUT G = +2, RL = 1kΩ to GND ±4.84 ±4.88 Output Voltage Swing V G = +2, RL = 150Ω to GND ±4.56 ±4.64 Current Output, Sinking and Sourcing ±55 ±85 mA Short-Circuit Current Output Shorted to Ground 150 mA Closed-Loop Output Impedance G = +2, f ≤ 100kHz 0.06 Ω POWER SUPPLY Minimum Operating Voltage ±1.4 V Maximum Operating Voltage ±5.5 V Maximum Quiescent Current VS = ±5V 4.25 5.9 mA Minimum Quiescent Current VS = ±5V 3.19 4.25 mA Power-Supply Rejection Ratio (+PSRR) Input-Referred 59 66 dB (2) Current is considered positive out of terminal. (3) Tested <3dB below minimum specified CMRR at ± CMIR limits. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: OPA830-EP |
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