数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

CS22210 数据表(PDF) 6 Page - Cirrus Logic

部件名 CS22210
功能描述  WIRELESS PCI/USB CONTROLLER
PDF  31 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS22210 数据表(HTML) 6 Page - Cirrus Logic

Back Button CS22210 Datasheet HTML 2Page - Cirrus Logic CS22210 Datasheet HTML 3Page - Cirrus Logic CS22210 Datasheet HTML 4Page - Cirrus Logic CS22210 Datasheet HTML 5Page - Cirrus Logic CS22210 Datasheet HTML 6Page - Cirrus Logic CS22210 Datasheet HTML 7Page - Cirrus Logic CS22210 Datasheet HTML 8Page - Cirrus Logic CS22210 Datasheet HTML 9Page - Cirrus Logic CS22210 Datasheet HTML 10Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 31 page
background image
CS22210 PCI/USB Wireless Controller
6 of 31
D556PP2
Rev. 3.0
www.cirrus.com
3.2
Digital Wireless Radio Interface
The CS22210 digital radio MAC I/F supports multiple radio baseband and RF interfaces. The
baseband registers can be programmed during the configuration time using the control port
interface. The MAC also provides the capability of programming the signal, service and
length on per packet basis without ARM intervention. This significantly improves the
performance of the system.
There are three primary digital interface ports for the CS22210 that are used for configuration
and during normal operation.
These ports are:
The Control Port, which is used to configure, set power consumption modes, write and/or
read the status of the radio base band registers.
The TX Port, which is used to output the data that needs to be transmitted from the
network processor.
The RX Port, which is used to input the received demodulated data to the network
processor.
3.3
FEC Codec
The FEC codec performs Reed-Solomon code encoding to protect the data before it is
transmitted to a noisy channel. It is a similar code as employed by digital broadcast industry,
such as ITU-T J.83 for DVB. The RS(255, 239) code implemented by the SWG2710 can
reduce error probability to 1/10e-9 in a typical 1/10e-3 error rate environment.
The
encoder/decoder can be programmed to vary the coding block length (N) and correctable
error (t) to optimize the tradeoff between channel utilization and data protection. The range of
N is currently setto befrom 50to255,and the t is 8. The symbol size is fixed at 8 bits.
Coding parameters can be set real time, allowing maximum flexibility for the system to adjust
the FEC setting, such as block size, in order to optimize channel efficiency. The encoder also
has a very low latency of two cycles. Both the encoder and decoder are fully pipelined in
structure to achieve single cycle throughput. The FEC can be disabled in firmware.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com