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CS22210 数据表(PDF) 13 Page - Cirrus Logic |
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CS22210 数据表(HTML) 13 Page - Cirrus Logic |
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13 / 31 page ![]() CS22210 PCI/USB Wireless Controller 13 of 31 D556PP2 Rev. 3.0 www.cirrus.com BBAS Output Baseband address strobe is used to envelop the address or the data on the BBSDX bus. Logic 1 envelops the address and a logic 0 envelops the data. This signal has to be set up to the rising edge of BBSCLK for the baseband processor and is driven on the falling edge of BBSCLK. NBBCS Output Baseband chip select is an active low output to activate the serial control port. When inactive the SD, BBSCLK, BBAS and BBRNW signals are ‘don’t cares’. TXPAPE Output Radio power amplifier power enable is a software-controlled output. This signal is used to gate power to the power amplifier. TXPE Output Radio transmit power enable indicates if transmit mode is enabled. When low, this signal indicates receive mode. RXPEBB Output Baseband receive power enable is an output that indicates if the MAC is in receive mode. This output to the baseband processor enables receive mode in baseband processor. BBSCLK Output Baseband serial clock is a programmable output generated by dividing ARM_CLK by 14 (default). This clock is used for the serial control port to sample the control and data signals. BBSDX Bi-directional Baseband serial data is a bi-directional serial data bus, which is used to transfer address and data to/from the internal registers of the baseband processor. SYNTHLE Output Synthesizer latch enable is an active high signal used to send data to the synthesizer. SYNTH_LE1 Output Synthesizer latch enable is an active high signal used to send data to the synthesizer (RF LE). SYNTH_LE2 Output Synthesizer latch enable is an active high signal used to send data to the synthesizer (IF LE). |
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