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CS22210 数据表(PDF) 2 Page - Cirrus Logic |
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CS22210 数据表(HTML) 2 Page - Cirrus Logic |
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2 / 31 page ![]() CS22210 PCI/USB Wireless Controller 2 of 31 D556PP2 Rev. 3.0 www.cirrus.com 2 Features Embedded ARM Core and System Support Logic • High performance ARM7TDMI RISC processor core at 77MHz • 4KB integrated, one-way set associative, unified, write through cache • Individual interrupt for each functional block • Two 23-bit programmable (periodic or one-shot) general purpose timers • 8 Dword (32-bits) memory write and read buffers for high system performance • Abort cycle detection and reporting for debugging • ARM performance monitoring function for system fine-tuning • Programmable performance improvement logic based on system configuration • Flexible independent DMA engines for PCI, USB and digital radio functional units Enhanced Memory Controller Unit • Programmable memory controller unit supporting SDRAM /async SRAM/boot ROM interface • 16-bit data bus with 12-bit address supporting up to 4MB at up to 103MHz SDRAM • 8-bit data bus with addressing support up to 1MB of boot ROM/Flash • Programmable SDRAM timing and size parameters such as CAS latencies and number of banks columns and rows FEC codec • High performance Reed-Solomon coding for error correction (255:239 block coding) • Reduces symbol error probability of a typical 10e-3 error rate environment to 10e-9 • Programmable rate FEC engine to optimize channel efficiency • Low latency, fully pipelined hardware encoding and decoding. Support byte wise single cycle throughput up to 77MHz, with a sustain rate of 77MBps. • Double buffering (64 Dword read/write buffer) to enhance system performance • On the fly configuration of encoder and decoder Digital Wireless Radio MAC • Standard interface to 802.11b radio baseband transceiver • 11Mbps data rate • 32 Dword transmit/receive FIFO • Supports clear channel assessment (CCA) Power Management • Host (PCI or USB) ACPI compliant • Remote USB host wakeup • Supports variable rate radio transmit, receive and standby radio power modes through two DACs Clock and PLL Interface • Single 44MHz crystal oscillator reference clock for PCI version; 48MHz reference clock required in USB option • Internal PLL to generate internal and on board clocks |
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