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L9733 数据表(PDF) 19 Page - STMicroelectronics

部件名 L9733
功能描述  Octal self configuring low/high side driver
PDF  34 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L9733 数据表(HTML) 19 Page - STMicroelectronics

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L9733
Functional description
Doc ID 11319 Rev 11
19/34
transistors. Source pins of outputs 1-5 (Src1-5) are connected to the sources of the
N-channel MOSFET transistors.
4.3
Outputs 6-8
These three self-configuring outputs can be used to drive either high or low-side loads. In
addition to being controlled by the SPI BUS these outputs can also be enabled and disabled
via the IN6 & IN7& IN8 inputs. The IN6, IN7 and IN8 inputs are logically or'd with the SPI
commands to allow either the IN6 & IN7 & IN8 inputs or the SPI commands to activate these
outputs. The use of the IN6 & IN7 & IN8 pins for PWM control on these outputs should only
be done with non-inductive loads if an external flyback diode is not present. The room
temperature Rdson of these four outputs is 0.7
. A current limited (100µA max) voltage
generator is connected to Src 6-8 for open load and short to GND detection when a low-side
configured output is commanded OFF. Another current limited (100µA max if VDrn 6-8 >
60%Vbat, 280 µA max if VDrn 6-8 < 60 %Vbat) voltage generator is connected to Drn 6-8
for open load and short to Vbat detection when a high-side configured output is commanded
OFF.
Drain pins of Outputs 6-8 (Drn6-8) are connected to the drains of the N channel MOSFET
transistors. Source pins of Outputs 6-8 (Src6-8) are connected to the sources of the N
channel MOSFET transistors.
4.4
Drn1-8 susceptibility to negative voltage transients
All outputs connected in the low-side configuration must have a ceramic chip capacitor of
0.01µF to 0.1 µF connected from drain to ground. This is needed to prevent potential
problems with the device operation due to the presence of fast negative transient(s) on the
drain(s) of the device. Adequate de-coupling capacitors from the Drain (VBAT) to ground
shall be provided for high-side configured outputs.
4.5
Supply pins
4.5.1
Main power input (Vdd)
An external +5.0 ±0.5 VDC supply provided from an external source is the primary power
source to the L9733. This supply is used as the power source for all of its internal logic
circuitry and other miscellaneous functions.
4.5.2
Battery supply (Vbat)
This input is the supply for the on board charge pump. This input shall be connected directly
to battery. If this input is not connected to the same supply, without additional voltage drops,
of the drains of any high-side connected outputs, then the Rdson of that given output will be
higher than the specified maximum.
4.5.3
Discrete inputs voltage supply (VDO)
This pin is used to supply the discrete input stages of L9733 and must be connected to the
same voltage used to supply the peripherals of the processor interfaced to L9733.



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