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54HSC 数据表(PDF) 5 Page - Dynex Semiconductor

部件名 54HSC
功能描述  Radiation hard 16-Bit ParallelError Detection & Correction
PDF  10 Pages
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制造商  DYNEX [Dynex Semiconductor]
网页  http://www.dynexsemi.com
标志 DYNEX - Dynex Semiconductor

54HSC 数据表(HTML) 5 Page - Dynex Semiconductor

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54HSC/T630
5/10
Total dose radiation not
exceeding 3x10
5 Rad(SI)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VDD
Supply Voltage
-
4.5
5.0
5.5
V
VIH1
TTL Input High Voltage
-
2.0
-
-
V
VIL1
TTL Input Low Voltage
-
-
-
0.8
V
VIH2
CMOS Input High Voltage
-
3.5
-
-
V
VIL2
CMOS Input Low Voltage
-
-
-
1.5
V
VOH1
TTL Output High Voltage
IOH = -4mA
2.4
-
-
V
VOL1
TTL Output Low Voltage
IOL = 12mA (CB or DB),
-
-
0.4
V
IOL = 4mA (SEF or DEF)
VOH2
CMOS Output High Voltage
IOH = -4mA
VDD-0.5
-
-
V
VOL2
CMOS Output Low Voltage
IOL = 12mA (CB or DB),
-
-
0.5
V
IOL = 4mA (SEF or DEF)
I1L
Input Low Current
VDD = 5.5, VIN = VSS
-
-
-10
µA
I1H
Input High Current
VDD = 5.5, VIN = VDD
--
50
µA
I2L
IO Low Current
VDD = 5.5, VIN = VSS
-
-
-50
µA
I2H
IO High Current
VDD = 5.5, VIN = VDD
--
50
µA
IDD
Power Supply Current
VDD = Max, S0 & S1 at
-
-
1
mA
5.5V, All CB & DB pins
grounded, DEF & SEF
open
VDD = 5V±10%, over full operating temperature range.
Mil-Std-883, method 5005, subgroups 1, 2, 3
Parameters at higher radiation levels available on request.
Table 6: Electrical Characteristics
Parameter
tPLH Propogation delay time, low-to-high-level output (Note 4)
tPLH Propogation delay time, low-to-high-level output (Note 4)
tPLH Propogation delay time, low-to-high-level output (Note 5)
tPLH Propogation delay time, low-to-high-level output (Note 5)
tPZH Output enable time to high level (Note 6)
tPZL Output enable time to low level (Note 6)
tPHZ Output disable time to high level (Note 7)
tPLZ Output disable time to low level (Note 7)
tS Set-up time to S1 ›
tH Hold time after S1 ›
1. V
DD = 5V ±10% and CL = 50pF, over full operating temperature and total dose = 300K Rad(Si)
2. Input Pulse V
SS to 3.0 Volts.(TTL), VDD -1V (CMOS).
3. Times Measurement Reference Level 1.5 Volts.
4. These parameters describe the time intervals taken to generate the check word during the memory write cycle.
5. These parameters describe the time intervals taken to flag errors during memory read cycle.
6. These parameters describe the time intervals taken to correct and output the data word and to generate and output the syndrome error code during
the memory read cycle.
7. These parameters describe the time intervals taken to disable the CB & DB buses in preparation for a new data word during the memory read cycle.
8. Mil-Std-883, method 5005, subgroups 9, 10, 11
9.
Parameters at higher radiation levels available on request.
From
(Input)
DB
DB
S1
⇑
S1
⇑
S0
⇓
S0
⇓
S0
⇑
S0
⇑
CB, DB
CB, DB
To
(Output)
CB
CB
DEF
SEF
CB, DB
CB, DB
CB, DB
CB, DB
-
-
Min.
-
-
-
-
-
-
-
-
30
15
Max.
58
58
29
29
40
45
45
65
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions (HST)
S0 = 0V, S1 = 0V
S0 = 0V, S1 = 0V
S0 = 3V
S0 = 3V
S1 = 3V (fig. 5)
S1 = 3V (fig. 4)
S1 = 3V (fig. 5)
S1 = 3V (fig. 4)
-
-
Conditions (HSC)
S0 = 0V, S1 = 0V
S0 = 0V, S1 = 0V
S0 = VDD-1V
S0 = VDD-1V
S1 = VDD-1V (fig. 5)
S1 = VDD-1V (fig. 4)
S1 = VDD-1V (fig. 5)
S1 = VDD-1V (fig. 4)
-
-
AC ELECTRICAL CHARACTERISTICS
Table 7: AC Electrical Characteristics



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