EM357 Mini Modules

Page 7

This document is subject to change without notice

Document No: 0011-00-07-00-000 (Issue H)

PIN SIGNALS I/O PORT CONFIGURATION

CEL’s MeshConnect Module has 33 edge I/O interfaces for connection to the user’s host board. The MeshConnect

Module Dimensions shows the layout of the 33 edge castellations.

MESHCONNECT I/O PIN ASSIGNMENTS

CEL MeshConnect

ZICM357SPx Module

Pin Number

Ember EM357

IC Pin Number

Name

Notes

1, 2, 12, 31, 33

49

GROUND

3

11

PC5

Digital I/O

TX_ACTIVE - Logic-level control for PA. The EM35x baseband controls TX_

ACTIVE and drives it high when in TX mode

Applies only to the ZICM357SP0. PC5 is a NC on the ZICM357SP2

4

12

RESET

Active Low chip reset (Input)

5

13

PC6

Digital I/O

OSC32B - 32.768 kHz crystal oscillator

nTX_ACTIVE - Inverted TX_ACTIVE signal

6

14

PC7

Digital I/O

OSC32A - 32.768 kHz crystal oscillator

OSC32_EXT - Digital 32.768 kHz clock input source

7

18

PA7

Digital I/O

TIM1C4 - Timer 1 Channel 4 input/output

REG_EN - External regulator open drain output

8

19

PB3

Digital I/O

TIM2C3 - Timer 2 Channel 3 input/output

SC1nCTS - UART CTS handshake of Serial Controller 1

SC1SCLK - SPI master/slave clock of Serial Controller 1

9

20

PB4

Digital I/O

TIM2C4 - Timer 2 Channel 4 input/output

SC1nRTS - UART RTS handshake of Serial Controller 1

SC1nSSEL - SPI slave select of Serial Controller 1

10

21

PA0

Digital I/O

TIM2C1 - Timer 2 Channel 1 input/output

SC2MOSI - SPI master data out/slave data in of Serial Controller 2

11

22

PA1

Digital I/O

TIM2C3 - Timer 2 Channel 3 input/output

SC2SDA - TWI data of Serial Controller 2

SC2MISO - SPI master data in/slave data out of Serial Controller 2

13

16, 23, 28, 37

14

24

PA2

Digital I/O

TIM2C4 - Timer 2 Channel 4 input/output

SC2SCL - TWI clock of Serial Controller 2

SC2SCLK - SPI master/slave clock of Serial Controller 2

15

25

PA3

Digital I/O

TIM2C2 - Timer 2 channel 2 input/output

SC2nSSEL - SPI slave select of Serial Controller 2

TRACECLK - Synchronous CPU trace clock

16

26

PA4

Digital I/O

ADC4 - ADC Input 4

PTI_EN - Frame signal of Packet Trace Interface (PTI)

TRACEDATA2 - Synchronous CPU trace data bit 2

17

27

PA5

Digital I/O

ADC5 - ADC Input 5

PTI_DATA - Data signal of Packet Trace Interface (PTI)

nBOOTMODE - Embedded serial bootloader activation out of reset

TRACEDATA3 - Synchronous CPU trace data bit 3

18

29

PA6

Digital I/O

TIM1C3 - Timer 1 channel 3 input/output