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ACT413 数据表(PDF) 10 Page - Active-Semi, Inc

部件名 ACT413
功能描述  Patented Primary Side Regulation Technology
PDF  16 Pages
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制造商  ACTIVE-SEMI [Active-Semi, Inc]
网页  http://www.active-semi.com
标志 ACTIVE-SEMI - Active-Semi, Inc

ACT413 数据表(HTML) 10 Page - Active-Semi, Inc

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ACT413
Rev 2, 27-Feb-14
Innovative PowerTM
- 10 -
www.active-semi.com
Copyright © 2014 Active-Semi, Inc.
Active-Semi Proprietary―For Authorized Recipients and Customers
ActivePSR
TM is a trademark of Active-Semi.
TYPICAL APPLICATION CONT’D
Design Example
The design example below gives the procedure for
a DCM fly back converter using an ACT413. Refer
to Application Circuit Figure 2, the design for an
adapter application starts with the following
specification:
The operation for the circuit shown in Figure 1 is as
follows: the rectifier bridge BD1 and the capacitor
C1/C2 convert the AC line voltage to DC. This
voltage supplies the primary winding of the
transformer T1 and the startup resistor R7/R8 to
VDD pin of ACT413 and C4. The primary power
current path is formed by the transformer’s primary
winding, the mosfet, and the current sense resistor
R9. The resistors R3, R2, diode D2 and capacitor
C3 create a snubber clamping network that protects
Q1 from voltage spike from the transformer primary
winding
leakage
inductance.
The
network
consisting of capacitor C4, diode D3 and resistor
R4 provides a VDD supply voltage for ACT413 from
the auxiliary winding of the transformer. The resistor
R4 is optional, which filters out spikes and noise to
makes VDD more stable. C4 is the decoupling
capacitor of the supply voltage and energy storage
component for startup. During power startup, the
current charges C4 through startup resistor R7/R8
from the rectified high voltage. The diode D4 and
the capacitor C7/C6 rectify filter the output voltage.
The resistor divider consists of R5 and R6
programs the output voltage.
Since a bridge rectifier and bulk input capacitors are
used, the resulting minimum and maximum DC
input voltages can be calculated:
Where ŋ is the estimated circuit efficiency, fL is the
line frequency, tC is the estimated rectifier
conduction time, CIN is empirically selected to be
2х10µF electrolytic capacitors.
The maximum duty cycle is set to be 42% at low
line voltage 85VAC and the circuit efficiency is
estimated to be 80%. Then the maximum average
input current is:
The maximum input primary peak current:
The primary inductance of the transformer:
The maximum primary turns on time:
The ringing periods from primary inductance with
mosfet Drain-Source capacitor:
Design only an half ringing cycle at maximum load
in minimum low line, so secondly reset time:
Base on conservation of energy and transformer
transform identity, the primary to secondary turns
ratio NP/NS:
The auxiliary to secondary turns ratio NA/NS:
V
105
F
10
2
8
.
0
)
ms
5
.
3
47
2
1
(
12
2
85
2
C
)
t
f
2
1
(
P
2
V
2
V
2
IN
C
L
OUT
2
MIN
_
INAC
MIN
_
INDC
-
-
-
μ
η
×
×
×
×
×
×
=
×
=
(3)
V
375
)
V
265
(
2
V
2
V
AC
AC
)
MAX
(
IN
DC
)
MAX
(
IN
=
×
=
×
=
(4)
mA
850
42
.
0
179
2
D
L
2
I
MAX
N
I
LIM
=
×
=
×
=
(6)
mH
6
.
0
k
80
mA
850
42
.
0
105
f
I
D
V
L
s
LIM
max
MIN
_
INDC
p
×
×
=
×
=
(7)
s
86
.
4
105
mA
850
mH
6
.
0
V
I
L
T
MIN
_
INDC
LIM
p
MAX
_
ON
μ
=
×
=
=
(8)
s
59
.
1
PF
100
%)
7
1
(
mH
6
.
0
14
.
3
2
C
L
2
T
MAX
_
DS
MAX
_
p
MAX
_
RINGING
μ
π
=
×
+
×
×
×
=
=
(9)
s
85
.
6
s
59
.
1
5
.
0
s
86
.
4
kHz
80
/
1
T
5
.
0
T
T
T
MAX
_
RINGING
MAX
_
ON
SW
RST
μ
μ
μ
=
×
=
=
-
-
-
-
(10)
64
.
13
45
.
0
5
105
85
.
6
86
.
4
V
V
V
T
T
N
N
D
OUT
MIN
_
IN
RST
ON
S
P
=
+
×
=
+
×
=
(11)
47
.
2
45
.
0
5
45
.
0
13
V
V
'
V
V
N
N
D
OUT
D
DD
S
A
=
+
+
=
+
+
=
(12)
mA
179
8
.
0
105
3
5
V
I
V
I
MIN
_
INDC
CC
_
OUT
OUT
MAX
_
IN
=
×
×
=
×
×
=
η
(5)
Input Voltage Range
90VAC - 265VAC, 50/60Hz
Output Power, PO
12W
Output Voltage, VOUTCV
5V
Full Load Current, IOUTFL
2.4A
CC Current, IOUTMAX
3-3.6A
System Efficiency CV,
η
0.8



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