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MB90P641APFV 数据表(PDF) 6 Page - fujitsu semiconductor |
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MB90P641APFV 数据表(HTML) 6 Page - fujitsu semiconductor |
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6 / 96 page ![]() 6 MB90640A Series s PIN DESCRIPTION (Continued) *1: FPT-100P-M05 *2: FPT-100P-M06 Pin no. Pin name Circuit type Function LQFP*1 QFP*2 80, 81 82, 83 X0, X1 A Crystal oscillator pins 47 to 49 49 to 51 MD0 to MD2 E (CMOS) Input pins for specifying an opration mode. Use these pins by directly connecting VCC or VSS. 75 77 RST G (CMOS/H) External reset request input pin 50 52 HST F (CMOS/H) Hardware standby input pin 83 to 90 85 to 92 P00 to P07 J (TTL) General purpose I/O ports This applies in single-chip mode with an external data bus in 8-bit mode. D00 to D07 In non-multiplex mode, the I/O pins for the lower 8 bits of the external data bus. AD00 to AD07 In multiplexed mode, the I/O pins for the lower 8 bits of the external address/data bus. 91 to 98 93 to 100 P10 to P17 J (TTL) General purpose I/O ports This applies in non-multiplexed mode with an 8-bit external data bus and in single-chip mode. P08 to D15 In non-multiplexed mode with a 16-bit external data bus, the I/O pins for the upper 8 bits of the external data bus. AD08 to AD15 In multiplexed mode, the I/O pins for the upper 8 bits of the external address/data bus. 99, 100, 1 to 6 1, 2, 3 to 8 P20, P21, P22 to P27 B (CMOS) General purpose I/O ports This applies in multiplexed mode. A00, A01, A02 to A07 In non-multiplexed mode, the output pins for the lower 8 bits of the external address bus. 7, 8, 10 to 15 9, 10, 12 to 17 P30, P31, P32 to P37 B (CMOS) General purpose I/O ports This applies in multiplexed mode. A08, A09, A10 to A15 In non-multiplexed mode, the output pins for the upper 8 bits of the external address bus. 16 to 20, 22 to 24 18 to 22, 24 to 26 P40 to P44, P45 to P47 B (CMOS) General purpose I/O ports This applies when the upper address control register specifies port operation. A16 to A20, A21 to A23 Output pins for A16 to A23 of the external address bus This applies when the upper address control register specifies address operation. |
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