PIN

NAME

FUNCTION

12

13

SGND

Analog Ground

14–16

PGND

Power Ground. Connect the PGND pins externally to the power ground plane. Connect the SGND and

kit data sheet for a layout example.

17–19

LX

Switching Node. Connect LX pins to the switching-side of the inductor. Refer to the MAX17543 EV kit

data sheet for a layout example.

20

BST

Boost Flying Capacitor. Connect a 0.1µF ceramic capacitor between BST and LX.

—

EP

Exposed Pad. Connect to the SGND pin. Connect to a large copper plane below the IC to improve heat

dissipation capability. Add thermal vias below the exposed pad. Refer to the MAX17543 EV kit data sheet

for a layout example.

SGND

1.215V

5V

LX

PGND

MODE

BST

LDO

EN/UVLO

RT

MAX17543

SYNC

CF

FB

SS

FB

OSCILLATOR

SWITCHOVER

LOGIC

ERROR AMPLIFIER/

LOOP COMPENSATION

MODE

SELECTION

LOGIC

SLOPE

COMPENSATION

RESET

LOGIC

CURRENT-SENSE

LOGIC

HICCUP

HICCUP

5µA

PWM/

PFM/

HICCUP

LOGIC

AND

DRIVERS

RESET

EN/UVLO

MAX17543

4.5V–42V, 2.5A, High-Efficiency,

Synchronous Step-Down DC-DC Converter

with Internal Compensation

www.maximintegrated.com

Maxim Integrated │ 11

Pin Description (continued)

Block Diagram